GPU Design Implementation Engineer(Synthesis)

Qualcomm; Austin (TX); On-site; USD 133,600 - 200,400; Full time

Benefits offered by this job

Competitive annual discretionary bonus

Annual RSU grants

Additional benefits for work-life balance

Job summary

Qualcomm seeks a Design Implementation Engineer to join the Adreno GPU team in Austin, Texas. This role involves managing front-end implementation design challenges and working closely with micro-architecture and physical design teams to achieve aggressive Power, Performance, and Area (PPA) targets.

The ideal candidate will have a strong background in ASIC design and experience with sub-micron technologies, as well as scripting and EDA tools. A bachelor's degree in Electrical or Computer Engineering is required, along with at least 5 years of relevant experience.

Qualifications

• 5+ years of direct front-end implementation and physical design experience.
• Strong background in VLSI design and scripting.
• Hands-on experience with designs in <10nm technology nodes.

Responsibilities

• Manage front-end implementation design challenges and methodology.
• Integrate and deliver GPU cores with aggressive PPA targets.
• Work closely with design teams to push performance.

Skills

Digital design and RTL synthesis

Front-end EDA tools (Synopsys)

CMOS circuit design

Scripting skills (tcl, perl, python)

Excellent communication skills

Debug and analytical skills

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

PhD in Electrical/Computer Engineering

Tools

Synthesis and Place and Route tools

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > GPU ASICS Engineering

General Summary

The Design Implementation Engineer will work in Qualcomm's Adreno GPU team and will be responsible for managing all aspects of front‑end implementation design challenges and methodology. As a member of the Graphics team, the successful applicant will integrate, implement and deliver state‑of‑the‑art GPU cores and will be working closely with the graphics micro‑architecture and physical design teams to push and meet very aggressive Power, Performance and Area (PPA) targets. This role is a hands‑on role which includes working with execution‑driven teams for tape‑outs by supporting new methodologies and new flows required to address better PPA. The successful candidate will possess in‑depth understanding of ASIC design flow and the challenges posed by advanced deep sub‑micron technologies.

Ideal Candidate Skills

• Experience with digital design and RTL synthesis
• Experience with front‑end EDA tools such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime
• Strong understanding of CMOS circuit design and design techniques to push Power, Performance and Area of complex designs
• Ability to think outside the box for innovative solutions to improve power and eliminate performance bottlenecks
• Strong understanding of GPU micro‑architecture and collaborate with RTL designers to improve bottlenecks for power and performance
• Solid working knowledge of scripting skills including tcl, perl or python
• Excellent communication skills and collaborating in a team environment is a must
• Excellent debug and analytical skills

Preferred Skills

• Hands‑on working experience in Physical design implementation is an advantage
• Working knowledge of sub‑micron technology process nodes e.g., 5nm, 4nm and below is highly advantageous (FINFETs and GAA)
• Knowledge and experience of graphics design and development
• Excellent interpersonal and team skills yet able to work independently and able to provide insights to solve complex problems, unique and detailed issues
• Familiar with the latest industry standard EDA tools for synthesis, formal verification, timing analysis and physical design
• Solid experience with leading a high performance team to push aggressive PPA targets is advantageous
• Strong background in VLSI design, scripting

Minimum Skills

• Bachelor’s degree in Electrical/Computer Engineering or related field with 5+ years of direct front‑end implementation and physical design work experience
• Master’s degree in Electrical/Computer Engineering or related field with 4+ years of direct front‑end implementation and physical design work experience
• PhD in Electrical/Computer Engineering or related field with 5+ years of direct front‑end implementation and physical design work experience
• Strong background and experience working with industry standard Synthesis and Place and Route tools including Signoff tools
• Hands on experience taping out designs in sub‑micron technology node design < 10nm
• Expect strong self‑motivation and time management skills

Minimum Qualifications

• Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 1+ year of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
• PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field.

EEO Statement

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay Range

$133,600.00 - $200,400.00

Benefits

Competitive annual discretionary bonus program and opportunity for annual RSU grants. Additional benefits are available to support success at work, at home, and at play.