GPU Design Verification Engineer

Intel Corporation; Hillsboro (OR); Hybrid; USD 142,000 - 232,000; Full time

Benefits offered by this job

Health benefits

Retirement plan

Vacation time

Job summary

Intel Corporation in the United States is seeking an experienced Verification Engineer to perform functional verification of graphics logic components, developing scalable IP verification plans and test benches.

You will execute verification plans, run system simulations, and collaborate with GPU architects and RTL teams to meet performance, power, and timing goals. Hybrid work is available in multiple US locations, including Oregon.

Qualifications

• Bachelor degree with 4+ years in silicon design development or Master’s with 3+ years in silicon design development.
• Test bench bring-up at IP level and strong programming in SystemVerilog and UVM.
• Hands-on verification experience on ASIC/CPU/GPU.
• Test plan development at IP level with coverage closures.
• Coverage driven verification, functional modeling and test writing.

Responsibilities

• Performs functional verification of graphics logic components to meet specs.
• Defines and develops scalable IP verification plans and test benches.
• Executes verification plans and runs system simulation models to verify design.
• Collaborates with GPU architects, RTL, and physical design teams to meet goals.
• Documents test plans and leads technical reviews with design teams.
• Maintains and improves verification infrastructure and TFMs.

Skills

Test bench bring-up at IP level

SystemVerilog

UVM

ASIC/CPU/GPU verification

Test plan development

Coverage driven verification

Education

Bachelor Degree in Electronics, Computer Engineering or related engineering

Master's Degree in Electronics, Computer Engineering or related engineering

Tools

SystemVerilog

UVM

Python

Perl

Shell scripting

Job description

Job Details: Job Description:

Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements. Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drive technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications:

Minimum Qualifications:

• Bachelor Degree in Electronics, Computer Engineering or related engineering with 4+ year experience in silicon design development OR Master's Degree in Electronics, Computer Engineering or related engineering with 3+ years of experience in silicon design development undefined.
• Test Bench bring-up at IP level and strong programming skills in System Verilog and UVM.
• Hands on verification experience working on ASIC, CPU or GPU.
• Test Plan development experience at IP level with coverage closures.
• Coverage driven verification testbench development functional modeling and test writing.

Preferred Requirements:

• Understanding of Graphics architecture.
• Experience with industry standard frontend design and verification flows, tools, methodology.
• Experience with scripting shell, PERL, python.

Job Type:

Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom, US, Oregon, Hillsboro

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust:

N/A

Benefits:

• competitive pay
• stock bonuses
• benefit programs which include health, retirement, and vacation

Annual Salary Range for jobs which could be performed in the US:

$141,910.00-232,190.00 USD

Work Model for this Role:

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Job posting details

* Job posting details (such as work model, location or time type) are subject to change.

Fees and Payment Policy:

We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.