GPU Design Verification Engineer

Intel; Folsom (CA); Hybrid; USD 142,000 - 269,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plans

Job summary

Intel seeks an experienced verification engineer to perform functional verification of graphics logic components, including 3D graphics and display. You will define scalable IP verification plans and test benches, then execute system simulations to verify design accuracy, analyze power and timing, and debug issues.

Collaboration with GPU architects, RTL developers, and physical design teams is essential to meet functional, performance, and power goals. Hybrid work model offered.

Qualifications

• Bachelor’s or Master’s in electronics/computer engineering or related field.
• 5+ years of experience for Bachelor's track.
• 4+ years of experience for Master’s track.
• Test Bench bring-up at IP level with SystemVerilog/UVM.

Responsibilities

• Perform functional verification of graphics logic components (3D, media, display).
• Develop scalable, reusable IP verification plans and test benches.
• Run system simulations to verify design, analyze power and timing, find bugs.
• Collaborate with GPU architects, RTL developers, and physical design teams.

Skills

SystemVerilog

UVM

Test bench design

Verification planning

Education

Bachelor’s degree in electronics, computer engineering, or related engineering

Master's degree in electronics, computer engineering, or related engineering

Tools

SystemVerilog

UVM

ASIC/CPU/GPU verification

Scripting (Python, PERL)

Job description

• Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.
• Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm graphics microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the pre-silicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborate with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
• Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Job Details

Job Description:

• Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.
• Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm graphics microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the pre-silicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborate with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
• Documents test plans and drive technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications

Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.

• Bachelor’s degree in electronics, computer engineering, or related engineering with 5+ years of experience.

OR

• Master's degree in electronics, computer engineering, or related engineering with 4+ years of experience.
• In the following:
  • Test Bench bring-up at IP level and strong programming skills in System Verilog, and UVM.
  • Hands on verification experience working on ASIC, CPU or GPU.
  • Test Plan development experience at IP level with coverage closures.
  • Coverage driven verification testbench development functional modeling and test writing.

Preferred qualifications

are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Understanding of Graphics architecture.
• Experience with industry standard frontend design and verification flows, tools, methodology.
• Experience with scripting shell, PERL, Python.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Primary Location

US, California, Santa Clara

Additional Locations

US, California, Folsom

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00 - 269,100.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.