GenAI ASIC Engineer Intern - Green Data Centers

Meta; Sunnyvale (CA); On-site; USD 83,000 - 96,000; Full time

Job summary

Meta seeks an ASIC Engineer Intern, Architecture to join its Infrastructure organization in Sunnyvale. You will help build accelerators for AI workloads, model architectures, and contribute to performance validation of data-center ASIC designs.

The role involves working with GenAI workloads, CUDA-based kernels, and hardware simulators while collaborating with expert engineers to create energy-efficient data center accelerators.

Qualifications

• Currently pursuing or holding a Master's or PhD in Electrical Engineering, Computer Engineering, or related fields.
• Proficient in C/C++ and object-oriented programming.
• Knowledge of computer architecture concepts and memory systems.
• Experience with GenAI or ML accelerator architectures is desirable.
• Experience with CUDA programming and hardware simulators is a plus.

Responsibilities

• Work on advanced ASIC architecture, algorithms and models for GenAI and deep learning workloads.
• Analyze data center workloads and map to ASIC architecture; develop kernels and models to validate designs.
• Implement models and kernels to validate accelerators and performance.

Skills

C/C++ programming

GenAI knowledge

Parallel programming

Hardware simulators

CUDA programming

Computer architecture

Problem solving

Education

Master's Degree in Electrical Engineering

PhD in Electrical/Computer Engineering

Tools

CUDA

Job description

Meta seeks an ASIC Engineer Intern, Architecture to join its Infrastructure organization in Sunnyvale. You will help build accelerators for AI workloads, model architectures, and contribute to performance validation of data-center ASIC designs.

The role involves working with GenAI workloads, CUDA-based kernels, and hardware simulators while collaborating with expert engineers to create energy-efficient data center accelerators.