ASIC Engineer Intern, Architecture

Meta; Sunnyvale (CA); On-site; USD 83,000 - 96,000; Full time

Job summary

Meta seeks an ASIC Engineer Intern, Architecture to join its Infrastructure organization in Sunnyvale. You will help build accelerators for AI workloads, model architectures, and contribute to performance validation of data-center ASIC designs.

The role involves working with GenAI workloads, CUDA-based kernels, and hardware simulators while collaborating with expert engineers to create energy-efficient data center accelerators.

Qualifications

• Currently pursuing or holding a Master's or PhD in Electrical Engineering, Computer Engineering, or related fields.
• Proficient in C/C++ and object-oriented programming.
• Knowledge of computer architecture concepts and memory systems.
• Experience with GenAI or ML accelerator architectures is desirable.
• Experience with CUDA programming and hardware simulators is a plus.

Responsibilities

• Work on advanced ASIC architecture, algorithms and models for GenAI and deep learning workloads.
• Analyze data center workloads and map to ASIC architecture; develop kernels and models to validate designs.
• Implement models and kernels to validate accelerators and performance.

Skills

C/C++ programming

GenAI knowledge

Parallel programming

Hardware simulators

CUDA programming

Computer architecture

Problem solving

Education

Master's Degree in Electrical Engineering

PhD in Electrical/Computer Engineering

Tools

CUDA

Job description

About

Meta is seeking an ASIC Engineer Intern, Architecture to join our Infrastructure organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our innovative services are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently. You will have an opportunity to work with AI/ML experts in the company, help architect state-of-the-art machine learning accelerators and contribute to modeling these accelerators. Come work and learn alongside our expert engineers to build “Green” data center accelerators.

Responsibilities

• Work on advanced architecture, algorithms and models targeting for GenAI and deep learning solutions.


• Analyze and map data center workloads to ASIC architecture; Develop architecture projections, kernels, performance and functional models to validate the architecture. Implement and analyze numerical algorithms and enhanced architecture for the data center accelerators.


• Implement various models needed for the validation of the accelerators.

Minimum Qualifications

• Currently has, or is in the process of obtaining, a Master's Degree in Electrical Engineering, Computer Engineering or related areas


• Programming skills in C, C++ or related Object Oriented Programming


• Knowledge of Computer Architecture concepts such as processor architecture, memory systems and on-chip interconnection networks


• Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment


• Intent to return to degree-program after the completion of the internship/co-op Currently has, or is in the process of obtaining, a PhD degree in Electrical Engineering, Computer Engineering or related areas


• Experience in GenAI or machine learning architectures or related experience


• Experience in developing AI kernels, CUDA programming, parallel programming, C++ code for hardware simulators and exposure to performance and numerical analysis of ASIC designs


• Creativity and problem solving capabilities