FPGA Verification Engineer Level 5 - Linthicum

Northrop Grumman; United States; On-site; USD 140,000 - 190,000; Full time

Benefits offered by this job

Relocation assistance may be available

Job summary

Northrop Grumman Space Systems in Linthicum, MD seeks a FPGA Verification Engineer‑Level 5 to lead verification across multiple programs, defining and scaling a VUnit‑based environment, and guiding teams through rigorous DFV practices. Strong leadership and DoD‑style aerospace experience preferred.

Responsibilities include planning, architecture of verification environments, CI/CD automation, and cross‑team collaboration to ensure design hand‑off with complete verification metrics.

Qualifications

• Bachelor's degree with 12 years of experience, or higher degrees with corresponding experience.
• Proficiency in SystemVerilog, Verilog, and VHDL.
• Familiarity with Synopsys and Mentor Graphics.
• Knowledge of VUnit and FPGA/ASIC/digital board development.

Responsibilities

• Verification Planning & Strategy: Create verification plans from system requirements and traceability.
• VUnit Framework Architecture: Design a reusable, VUnit-based verification environment.
• Automation & CI/CD: Set up CI pipelines and automate test generation and analysis.
• Test Development & Execution: Write VHDL testbenches and VUnit test suites; develop coverage models.
• Debug & Failure Analysis: Perform root-cause analysis and coordinate lab validation.
• Verification Closure: Deliver coverage reports and ensure criteria are met.
• Leadership & Mentorship: Lead FPGA verification engineers and mentor junior staff.
• Cross‑Team Collaboration: Partner with design, firmware, and software teams.

Skills

SystemVerilog

Verilog

VHDL

VUnit

Education

Electrical Engineering

Master's in Electrical Engineering

PhD in related field

Tools

Synopsys

Mentor Graphics

Job description

RELOCATION ASSISTANCE: Relocation assistance may be available

CLEARANCE REQUIRED FOR START: No

CLEARANCE TYPE: None

TRAVEL: Yes, 10% of the Time Description

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Join Northrop Grumman Eastern Region Engineering Team on our continued mission to push the boundaries of possible across space systems. Enjoy a culture where your voice is valued and start contributing to our team of passionate professionals providing real-life solutions to our world's biggest challenges. We take pride in creating purposeful work and allowing our employees to grow and achieve their goals every day by Defining Possible. With our competitive pay and comprehensive benefits, we have the right opportunities to fit your life and launch your career today.

Northrop Grumman Space Systems is currently seeking a FPGA Verification Engineer-Level 5 for the development of digital subsystems and products. In this position the Verification Engineer will be leading FPGA verification efforts across multiple programs. This individual will be responsible for defining, implementing and scaling a modern verification methodology using VUnit, while also providing technical leadership and team oversight. The ideal candidate brings deep expertise in FPGA verification, strong leadership skills and experience in aerospace/defense or other high-reliability environments.

Their primary task is to verify that FPGA designs meet the necessary specifications and operate as intended, identifying and correcting potential issues early in the design process. This role will work out of our Linthicum , MD campus.

Roles and Responsibilities:

• Verification Planning & Strategy - Create verification plans from system requirements, define scope, methodology, coding standards, coverage goals, and traceability matrices.
• VUnit Framework Architecture - Design and roll out a reusable, VUnit‑based verification environment, including libraries, VIP, and a modular test‑bench architecture that can be shared across programs.
• Automation & CI/CD - Set up CI pipelines (e.g., Jenkins) for nightly regression, coverage collection, and metric reporting; automate test generation, execution, and result analysis with Python/Tcl scripts.
• Test Development & Execution - Write VHDL test benches and VUnit test suites; develop functional‑coverage models, assertions, directed and random stimulus, and verification IP as needed.
• Debug & Failure Analysis - Perform root‑cause analysis of simulation failures, coordinate hardware bring‑up and lab validation, and work with designers to resolve bugs quickly.
• Verification Closure - Deliver functional‑coverage, code‑coverage, and requirements‑traceability reports; ensure all verification metrics meet program exit criteria before design hand‑off.
• Leadership & Mentorship - Lead a team of FPGA verification engineers across multiple programs, coach junior staff on verification best practices, and promote design‑for‑verification (DFV) throughout the organization.
• Cross‑Team Collaboration - Partner with design, systems, firmware, and software groups to guarantee complete verification coverage; actively participate in SRR, PDR, CDR, and TRR reviews.
• Risk Management & Compliance - Identify technical risks early, define mitigation plans, and enforce adherence to internal FPGA development processes, security standards, and DoD clearance requirements.
• Continuous Improvement - Drive adoption of industry‑standard verification methodologies, evaluate emerging tools, and contribute to process‑optimization initiatives that enhance productivity and product quality.

Basic Qualifications:

Bachelor's degree with 12 years of experience, a master's degree with 10 years of experience or a PhD with 7 years of experience in Electrical Engineering, Computer Engineering, Computer Science, or related technical fields.

Proficiency in hardware description languages (e.g., SystemVerilog, Verilog, VHDL).

Familiarity with industry-standard tools (e.g. Synopsys, Mentor Graphics).

Knowledge and hands‑on experience with VUnit .

Digital subsystem, ASIC, FPGA and/or digital board development experience and knowledge essential

Candidate must have good communication skills, strong interpersonal skills, and go