FPGA Engineer Intern: Build Low-Latency Trading Tech

Optiver; Chicago, Northern (IL, KY); Hybrid; USD 30,000 - 42,000; Full time

Benefits offered by this job

Flights covered

Living accommodations

Commuting stipend

Office perks

Job summary

Optiver is seeking an FPGA Engineer Intern for Summer 2027 in Chicago. You’ll work with mentors to build real‑world FPGA solutions powering a global trading firm, tackling nanosecond‑scale latency and highly parallel algorithms.

Interns collaborate with traders, software developers, and infrastructure engineers, with opportunities to work in our Austin office as well. Compensation is competitive and includes various benefits.

Qualifications

• Pursuing a bachelor’s, master’s, or PhD in Computer Engineering or Electrical Engineering with graduation between Dec 2027 and Jun 2028.
• Hands-on experience in digital design with FPGAs or ASICs.
• Experience writing hardware in VHDL, Verilog, or SystemVerilog.
• Strong engineering instincts and collaborative mindset.

Responsibilities

• Accelerate high‑speed FPGA and networking components with optimized designs.
• Research low‑latency techniques and integration opportunities for trading systems.
• Collaborate in a multidisciplinary team of traders, software engineers, and infrastructure staff.
• Leverage in‑house hardware and server platforms to interface with cutting‑edge tech.

Skills

Digital FPGA design

HDL languages (VHDL Verilog SV)

Collaborative teamwork

Clean code & architecture

Education

CE/EE student (Bachelor/Master/PhD)

Tools

VHDL

Verilog

SystemVerilog

Job description

Optiver is seeking an FPGA Engineer Intern for Summer 2027 in Chicago. You’ll work with mentors to build real‑world FPGA solutions powering a global trading firm, tackling nanosecond‑scale latency and highly parallel algorithms.

Interns collaborate with traders, software developers, and infrastructure engineers, with opportunities to work in our Austin office as well. Compensation is competitive and includes various benefits.