FPGA Engineer: Energy-Efficient AI Compute (Remote)

Ludwig Computing, Inc.; Mill Valley, Northern (CA, KY); Hybrid; USD 90,000 - 150,000; Full time

Job summary

Ludwig Computing, Inc. is seeking a Hardware FPGA Engineer to design, verify, and test custom compute hardware in Mill Valley, CA with remote work options. You will develop FPGA blocks for AI workloads, work closely with the founding team, and contribute to architecture and prototyping.

The role emphasizes FPGA RTL/HLS design, experience with Vivado or Quartus, and strong digital design fundamentals. Candidates should enjoy fast-paced research-to-build projects.

Qualifications

• Experience with FPGA RTL or HLS design in Verilog, SystemVerilog, VHDL, or C++.
• Experience with FPGA development tools (Vivado, Quartus, or equivalent).
• Strong digital design and electronic systems background.
• Knowledge of pipelining and timing closure.
• Experience with memory mapping on FPGA.
• OpenCL or HLS-based FPGA design experience.
• Hardware/software co-design and system integration.

Responsibilities

• Translate architectural concepts into FPGA prototypes.
• Design and simulate modules using Verilog, VHDL, or high-level synthesis (HLS).
• Implement and validate components on FPGA platforms using industry-standard tools (Vivado, Quartus, OpenCL).
• Benchmark performance and optimize latency, area, throughput, and memory bandwidth.
• Build testbenches, run timing/area analysis, and assist with system integration.
• Collaborate with system architects, FPGA design engineers, and embedded software engineers.
• Generate and execute the FPGA Verification Test Plan and FPGA Verification Matrix.

Skills

FPGA development

Verilog/SystemVerilog

VHDL

C++

HLS

Vivado

Quartus

OpenCL

Synthesis workflows

Education

B.S. in Electrical Engineering

Tools

Vivado

Quartus

Job description

Ludwig Computing, Inc. is seeking a Hardware FPGA Engineer to design, verify, and test custom compute hardware in Mill Valley, CA with remote work options. You will develop FPGA blocks for AI workloads, work closely with the founding team, and contribute to architecture and prototyping.

The role emphasizes FPGA RTL/HLS design, experience with Vivado or Quartus, and strong digital design fundamentals. Candidates should enjoy fast-paced research-to-build projects.