FPGA Engineer, Amazon LEO OISL

Amazon Kuiper Manufacturing Enterprises LLC; Redmond (WA); On-site; USD 97,000 - 160,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Job summary

Amazon Leo is building a high-performance FPGA-based solution for inter-satellite communication. The engineer will own FPGA bitstreams, collaborate with architects to define digital logic, and ensure robust validation from RTL coding to lab-based silicon checks.

The role emphasizes timing closure, power optimization, and integration with hardware/software teams for a production-ready interface. The team values expertise in SystemVerilog, UVM, and experience with Xilinx FPGAs, with a focus on

Qualifications

• 3+ years in ASIC/FPGA design and verification tools.
• Experience with SystemVerilog and UVM verification.
• Familiarity with Xilinx/AMD or Intel FPGAs.
• RTL coding, lint, CDC/RDC, timing optimization.

Responsibilities

• Create FPGA solutions to support LEO’s Optical inter-satellite Link system.
• Own one or more FPGA bitstreams through development phases and release.
• Collaborate with system architects to define/design/validate FPGA functions.
• Collaborate with HW/SW teams to bring up and test system solutions.
• Drive trade-off analyses for cost/size/power/performance/features.

Skills

ASIC/FPGA design

SystemVerilog/UVM

Xilinx/AMD FPGA

RTL coding

Python scripting

Tools

Xilinx Vivado

Intel Quartus

Job description

Amazon Leo is Amazon's low Earth orbit satellite network. Our mission is to deliver fast, reliable broadband connectivity to customers beyond the reach of existing networks. From households to small businesses, schools, hospitals, and government agencies, Amazon Leo will serve communities and organizations operating in places without dependable internet access.

Export Control Requirement

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities

• Create FPGA solutions to support LEO's Optical inter satellite Link system. This is a unique opportunity to define a new system with few legacy constraints. The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to enable LEO. This will focus on creating digital designs using the latest generations of FPGA technologies and tools.

In this role you will:

• Have ownership of one or more FPGA bitstreams. - Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure-Simulation Validation- Lab Based Silicon Validation
• Collaborate with system architects to define and design/implement/test/release/support functions targeted to FPGA technology
• Collaborate with system architects and design engineers to implement digital logic functions in FPGAs
• Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives
• Collaborate with systems architects, HW engineering design teams & FW/SW design teams to bring up and test the system solutions.
• Drive trade-off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features

Basic Qualifications:

• 3+ years of experience with ASIC/FPGA design and verification tools
• 3+ years of experience in ASIC/FPGA design verification using System Verilog, UVM
• Experience with Xilinx/AMD (or Altera) FPGAs
• Experience with uArchitecture, RTL coding, lint checks, CDC, RDC, FPGA optimization for timing & power, simulation, and validation
• Experience in writing test scripts (Python preferred) to validate FPGA images in HW

Preferred Qualifications:

• 5+ years of full RTL development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
• Designs, optimizes, and implement digital logic functions in control/communication and data acquisition systems
• Deep understanding of logic elements, memory blocks, DSP slices, and I/O capabilities
• Familiarity with AXI4 and AXI Streaming interfaces
• Proven track record of successfully taking FPGA/ASIC designs from development through production and deployment
• Experienced in integrating HDL simulation and hardware-in-the-loop (HIL) testing into CI/CD pipelines, ensuring automated regression testing and timing analysis validation for every code commit.

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.

Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, WA, Redmond - 96,600.00 - 160,000.00 USD annually