FPGA/Embedded Hardware Design Engineer

SAIC

United States

On-site

USD 120,000 - 190,000

Full time

10 days ago

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Job summary

SAIC is seeking an experienced FPGA/Embedded-Systems Engineer to design, verify, and integrate advanced digital processing architectures. The role demands strong FPGA development using VHDL/Verilog, embedded software skills, and a deep understanding of DSP, timing closure, and Linux-based workflows.

You will work on SDR platforms, develop on Linux, and use Xilinx Vivado/Vitis, ModelSim, and other toolchains while maintaining robust production-ready designs under TS/SCI with Poly clearance.

Qualifications

  • Bachelor's degree plus 14+ years or Master's 12+ years or PhD/JD 9+ years.
  • Additional experience may substitute for a degree.
  • Must be a U.S. citizen with an active TS/SCI with Poly clearance.

Responsibilities

  • Design FPGA architectures using VHDL-2019, VHDL-2008, VHDL, and basic Verilog as required.
  • Target Xilinx UltraScale+ MPSoC devices; Versal a strong plus.
  • Create self-checking simulation constructs and testbenches to validate behavior.
  • Automate toolflows with Tcl and shell scripting.
  • Develop high-throughput streaming data paths and timing constraints.
  • Debug FPGA with HDL simulation, waveform analysis, and logic analyzers.
  • Develop embedded software in C/C++/Python to interface with FPGA logic.
  • Contribute to DSP algorithm design as needed.
  • Work with SDR platforms (USRP, Pluto SDR) for system development.
  • Apply microcontroller firmware design for embedded subsystems.
  • Develop on Linux systems and write Bash automation scripts.
  • Use Xilinx tools (Vivado, Vitis) and XSim; perform simulations with ModelSim/Aldec.
  • Collaborate using Git for version control.

Skills

FPGA development (VHDL/Verilog)
Embedded software development
DSP algorithms
Linux workflows
HDL verification & testbenches
Xilinx MPSoC/Versal experience
SDR platforms (USRP/Pluto)
C/C++/Python programming
Git version control
Vivado/Vitis toolchains

Education

Bachelor's degree in engineering
Master's degree in engineering
PhD in engineering
Additional experience may substitute for a degree

Tools

Xilinx Vivado
Xilinx Vitis
ModelSim
Aldec Riviera Pro

Job description

SAIC is seeking an experienced FPGA/Embedded-Systems Engineer to design, verify, and integrate advanced digital processing architectures. The ideal candidate will possess strong FPGA development experience using VHDL and Verilog, along with embedded software skills and a deep understanding of digital signal processing, timing closure, and Linux-based workflows. This role requires the ability to solve complex technical problems and deliver robust production-ready designs.

Key Responsibilities:
  • Develop FPGA architectures using VHDL-2019, VHDL-2008, VHDL, and basic Verilog as required.
  • Design solutions targeting Xilinx UltraScale+ MPSoC devices; experience with Versal devices is a strong plus.
  • Create self-checking simulation constructs and testbenches to validate functional and corner-case behavior.
  • Script simulation, synthesis, and implementation workflows using Tcl and shell scripting to automate toolflows.
  • Implement high-throughput streaming data paths, including FIFO structures, CDC mechanisms, circular buffers, clocking architectures, and timing constraints.
  • Perform FPGA debug through HDL simulation, waveform analysis, hardware debugging, and logic analyzer tools.
  • Develop and debug embedded software in C, C++, Python, and related languages to interface with FPGA logic.
  • Contribute to DSP algorithm design when needed, depending on project requirements.
  • Work with SDR platforms such as Ettus USRP, Epiq Matchstiq, and Pluto SDR to support system-level development.
  • Apply knowledge of microcontroller firmware design for supporting embedded subsystems.
  • Develop on Linux systems and write automation scripts using Bash.
  • Use Xilinx Vivado and Vitis toolchains including Hardware Manager, IP Integrator, IP packaging, and XSim simulation.
  • Simulate HDL using tools such as Aldec Riviera Pro and ModelSim for detailed design verification.
  • Build customized embedded Linux distributions for MPSoC and Versal devices using Yocto.
  • Set up and debug FlexLM license servers as part of maintaining development environments.
  • Leverage AI/ML code assistants to enhance development efficiency when appropriate.
  • Use Git for version control and collaborative software and FPGA development.
Required Education:

Bachelors and fourteen (14) years or more experience; Masters and twelve (12) years or more experience; PhD or JD and nine (9) years or more experience.

  • Additional experience may be substituted for a degree
Clearance Requirement:
  • Must be a U.S. citizen with an active TS/SCI with Polygraph level clearance
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