Founding DSP Architect - Satellite Payload

EVONA; Seattle (WA); Hybrid; USD 225,000 - 275,000; Full time

Benefits offered by this job

Base salary up to $250,000 + benefits

Flexible remote/hybrid arrangements

Founding-team opportunity

Direct access to senior leadership

Job summary

EVONA in Seattle is seeking a Founding DSP Engineer to define and develop the RF signal processing architecture for our satellite payloads. This role bridges DSP algorithms, FPGA implementation and hardware systems, owning the technology from concept through hardware validation.

You will architect DSP hardware on AMD/Xilinx RFSoC and Versal, lead design activities, collaborate with EEs and partners, and influence the technical roadmap.

Qualifications

• Senior, Staff or Principal level DSP/FPGA engineering experience.
• Hands-on AMD/Xilinx RFSoC (Zynq UltraScale+/Versal) experience.
• Strong DSP fundamentals and hardware-efficient algorithm implementation.
• Experience taking hardware platforms from requirements through development and bring-up.
• Familiarity with RTL development, Vivado/Vitis, MATLAB/Python and embedded systems.
• Background in satellite communications or RF systems.

Responsibilities

• Architect DSP hardware systems based on AMD/Xilinx RFSoC and Versal.
• Define hardware requirements based on signal processing performance targets.
• Lead hardware design activities with electrical engineers, PCB designers and partners.
• Develop DSP functionality including digital conversion, filtering, synchronization and channelization.
• Support FPGA development, hardware/software integration, prototype bring-up and testing.
• Collaborate with VP of RF Payload and team to shape the technical roadmap.

Skills

DSP/FPGA engineering

RFSoC (AMD/Xilinx)

DSP fundamentals

RTL development

Vivado/Vitis

MATLAB/Python

Embedded systems

Satellite communications

Tools

Vivado

Vitis

MATLAB

Python

Job description

EVONA in Seattle is seeking a Founding DSP Engineer to define and develop the RF signal processing architecture for our satellite payloads. This role bridges DSP algorithms, FPGA implementation and hardware systems, owning the technology from concept through hardware validation.

You will architect DSP hardware on AMD/Xilinx RFSoC and Versal, lead design activities, collaborate with EEs and partners, and influence the technical roadmap.