FE Engineering

Socket.dev; Austin (TX); On-site; USD 140,000 - 210,000; Full time

Job summary

APPLE INC in Austin, Texas is seeking a GPU RTL Engineer to implement SystemVerilog RTL for GPU blocks, simulate and debug with CAD tools, and drive PPA goals.

You will synthesize designs, analyze area, power and timing, review test plans with verification engineers, and collaborate with backend and synthesis teams to refine placement and routing for full-chip integration. 40 hours/week.

Qualifications

• Master’s degree in Electrical and Computer Engineering or related field.
• Experience with Computer Architecture and Microarchitecture for GPUs.
• Experience with RTL coding using SystemVerilog.
• Experience with synthesis and timing analysis for area/power optimization.
• Experience with CAD tools for debug and synthesis.
• Experience with VLSI design to design GPUs.
• Experience with scripting languages (Python/Perl).

Responsibilities

• Write SystemVerilog RTL code based on microarchitecture specs for GPU components.
• Simulate and debug RTL using CAD tools to ensure design correctness.
• Synthesize the design and analyze area, power, and timing to verify PPA goals.
• Collaborate with verification engineers to review plans, debug failures, and ensure coverage.
• Coordinate with backend and synthesis teams to review placement and routing feedback and adjust design.
• Perform timing analysis and optimize logic to meet critical path constraints.
• Coordinate with cross-functional teams to integrate module into the full chip.

Skills

SystemVerilog RTL coding

Computer Architecture

GPU microarchitecture

Scripting (Python/Perl)

Education

Master’s degree in Electrical and Computer Engineering

Tools

CAD Tools

Job description

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Write System Verilog RTL code based on microarchitecture specs for GPU components; Simulate and debug RTL using CAD tools to ensure design correctness. Synthesize the design and analyzing area, power, and timing reports to verify PPA goals. Work with verification engineers to review test plans, debug failures, and ensure full coverage. Collaborate with backend and synthesis teams to review placement and routing feedback and make design adjustments accordingly. Participate in design and architecture reviews to discuss interface definitions, data flows, and module responsibilities. Perform timing analysis and optimize design logic to meet critical path constraints. Coordinate with cross-functional team members to align schedules, resolve issues, and support the integration of my module into the full chip. 40 hours/week.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.
• Experience and/or education must include:
• Experience in Computer Architecture and Microarchitecture for contributing to the microarchitecture of different GPU blocks
• Experience with RTL Coding Using System Verilog
• Experience with performing synthesis and timing Analysis for area and power optimizations.
• Utilizing CAD Tools for debug and synthesis.
• Experience with VLSI Design to design GPUs
• Experience with scripting languages such as Perl/Python
• Experience with working on GPUs

Preferred Qualifications

N/A