FE Engineer

Apple, Inc.; Austin (TX); Sur place; USD 120 000 - 180 000; Plein temps

Résumé du poste

Apple Inc. in Austin, Texas seeks a performance-focused hardware/software engineer to analyze RTL and model performance, identify bottlenecks, and drive robust verification strategies. You will develop testbench infrastructure and data-visualization methods across SystemVerilog, C++, and Python.

Ideal candidates hold a Master’s in Electrical/Computer Engineering with 2 years of related experience and are proficient in Python, C++, and SystemVerilog, including waveform tools.

Qualifications

• Master’s Degree or foreign equivalent in Electrical Engineering, Computer Engineering, or related field and 2 years of experience in the job offered or related position.
• Experience in Computer Architecture, including Cache Coherency, Cache Hierarchy Fundamentals, Fabric Interconnect fundamentals to help debug performance bottlenecks
• Experience in Data Structures and Algorithms, including using python, C++ and System Verilog to work on multi-language codebases.
• Experience in Object Oriented Programming, including using python, C++ and System Verilog to work on multi-language codebases.
• Using waveform viewers to debug performance bottlenecks in hardware, including developing System Verilog monitors to automate performance stat collection.
• Using C and C++, including updating and reviewing software model used to represent the hardware.
• Scripting in Python and Perl experience, including using scripting in Python and Perl to analyze and provide visual representation of performance data.
• Experience in design verification to help develop robust test plans.

Responsabilités

• Correlate RTL performance against model performance.
• Identify performance bottlenecks in design and coordinate with Architecture to improve performance.
• Define performance statistics to help with performance debugging and standard methodologies to enhance correlation effort.
• Develop testbench infrastructure for monitoring, checking and covering on-chip activity in SystemVerilog, and C++.
• Architect and implement data analysis and visualization methodologies of simulation performance data.
• Review results and analysis of performance validation work with the cross-functional audience.
• Drive the definition of the testing methodology for executing the test plan.

Connaissances

Cache Coherency

Fabric Interconnect

Data Structures

Algorithms

Python

C++

SystemVerilog

Waveform Viewer

OOP Programming

Design Verification

Formation

Master’s Degree in Electrical/Computer Engineering

Outils

SystemVerilog

Python

C++

Description du poste

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Work with all fields (vertical product models) with a critical impact in getting impactful products to millions of customers quickly. Work closely with Architecture to understand the performance goals of the design. Correlate RTL performance against model performance. Perform deep performance analysis in the design and report findings. Identify performance bottlenecks in design and coordinate with the Architecture team to improve performance. Define performance statistics to help with performance debugging and standard methodologies to enhance performance correlation effort. Utilize strong interpersonal skills, work independently, and lead work to align with the project goals, plus support multi-functional engineering efforts. Work with Architecture, Modeling, Micro-Architecture, Design, and Verification teams for performance test plan definition. Drive the definition of the testing methodology for executing the test plan. Develop testbench infrastructure for monitoring, checking and covering on-chip activity in SystemVerilog, and C++. Architect and implement data analysis and visualization methodologies of simulation performance data. Design and Performance Model. Review results and analysis of performance validation work with the cross-functional audience.40 hours/week.

Minimum Qualifications

• Master’s Degree or foreign equivalent in Electrical Engineering, Computer Engineering, or related field and 2 years of experience in the job offered or related position.
• Experience and/or education must include:
• Experience in Computer Architecture, including Cache Coherency, Cache Hierarchy Fundamentals, Fabric Interconnect fundamentals to help debug performance bottlenecks
• Experience in Data Structures and Algorithms, including using python, C++ and System Verilog to work on multi-language codebases.
• Experience in Object Oriented Programming, including using python, C++ and System Verilog to work on multi-language codebases.
• Using waveform viewers to debug performance bottlenecks in hardware, including developing System Verilog monitors to automate performance stat collection.
• Using C and C++, including updating and reviewing software model used to represent the hardware.
• Scripting in Python and Perl experience, including using scripting in Python and Perl to analyze and provide visual representation of performance data.
• Experience in design verification to help develop robust test plans.

Preferred Qualifications

• N/A

This position is not subject to the application limits.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.
Learn about accessibility in Apple’s workplace
Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.