Ethernet Scale-Up Architect & Lead Engineer

TylSemi, Inc.; San Jose (CA); On-site; USD 238,000 - 286,000; Full time

Job summary

TYLsemi is developing purpose-built connectivity chiplet for HPC/rack-scale AI systems. We are seeking a Principal Engineer Ethernet Scale-up to lead the architecture and design of next-generation Ethernet Scale-Up Networking (ESUN) solution.

This is a high-impact technical role. You'll define architecture for Ethernet-based AI scale-up interconnects, drive RTL, verification, and production, and collaborate across hardware, firmware, software, and system teams to deliver industry-leading AI

Qualifications

• 15+ years of ASIC/SoC architecture and design experience.
• Proven track record delivering networking, NIC, switch, DPU, accelerator interconnect, or high-speed silicon.
• Deep expertise in SystemVerilog/RTL design and high-performance datapath architecture.
• Strong knowledge of Ethernet, RDMA, traffic management, congestion control, and scalable fabric architectures.
• Experience across the full ASIC lifecycle, from architecture to production silicon.

Responsibilities

• Define architecture for Ethernet-based AI scale-up interconnects and accelerator fabrics.
• Lead development of high-performance Ethernet Subsystem microarchitectures including RDMA, packet processing, network offload, traffic management, congestion control, and reliability mechanisms.
• Drive execution from architecture through RTL, verification, physical design, silicon bring-up, and production.
• Optimize performance, latency, scalability, power, and reliability for demanding AI and HPC workloads.
• Collaborate across hardware, firmware, software, and system teams to deliver industry-leading AI networking solutions.
• Serve as a company-wide technical leader, influencing product strategy, roadmap, and architectural direction.

Skills

ASIC/SoC architecture

RTL design

High-speed datapath

Ethernet networking

RDMA

Interconnect fabrics

Tools

PCIe Gen6/Gen7

UCIe

CXL

Job description

TYLsemi is developing purpose-built connectivity chiplet for HPC/rack-scale AI systems. We are seeking a Principal Engineer Ethernet Scale-up to lead the architecture and design of next-generation Ethernet Scale-Up Networking (ESUN) solution.

This is a high-impact technical role. You'll define architecture for Ethernet-based AI scale-up interconnects, drive RTL, verification, and production, and collaborate across hardware, firmware, software, and system teams to deliver industry-leading AI