Engineer I - Test (Development)

Microchip Technology Inc.; San Jose (CA); On-site; USD 68,640 - 128,000; Full time

Benefits offered by this job

Competitive base pay

Restricted stock units

Quarterly bonus payments

Health benefits from day one

Retirement savings plans

ESPP program with a 2-year look back feature

Job summary

A leading embedded control applications provider located in San Jose is seeking an Engineer I - Test (Development) to define and implement test solutions for next generation FPGA SOC products. Responsibilities include working with design engineers to develop test methods and supporting initial silicon bring-up. The ideal candidate should have a BSEE/BSCS or equivalent, knowledge of CMOS circuits, and programming capabilities in C/C++ or JAVA. Pay range: $68,640 - $128,000 annually.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering preferred.
• Knowledge of circuit operation and characteristics.
• Capable of programming in relevant languages.

Responsibilities

• Define and implement embedded firmware and integrated circuit tests.
• Develop test flows to ensure performance of integrated circuits.
• Support initial silicon bring-up and debug processes.

Skills

CMOS digital or analog circuit operation

Verilog and basic logic design

VLSI test methods knowledge

Programming in C/C++ or JAVA

Operating bench equipment

Education

BSEE / BSCS or equivalent MSEE / MSCS

Tools

DVM

oscilloscope

logic analyzer

Job description

Engineer I - Test (Development) role at Microchip Technology Inc.

Microchip Technology Inc. is a leading provider of embedded control applications. Our product portfolio comprises general purpose and specialized 8‑bit, 16‑bit, and 32‑bit microcontrollers, 32‑bit microprocessors, field‑programmable gate array (FPGA) products, a broad spectrum of high‑performance linear, mixed‑signal, power management, thermal management, radio frequency (RF), timing, safety, security, wired connectivity and wireless connectivity devices, as well as serial Electrically Erasable Programmable Read Only Memory (EEPROM), Serial Flash memories, Parallel Flash memories, and serial Static Random Access Memory (SRAM). We also license Flash‑IP solutions that are incorporated in a broad range of products.

Microchip Technology Inc. has an Engineer I‑Test (Development) opening based in San Jose, CA. The successful candidate will be responsible for the following.

• Define and implement embedded firmware and integrated circuit test solutions for next generation FPGA SOC Products.
• Work with senior team members and design engineers to define customer DFT (Design‑For‑Test) features, test methods and test coverage requirements to effectively screen manufacturing defects and ensure performance of integrated circuits.
• Plan, generate, simulate, and validate integrated circuit test methods, associated test firmware and fault coverage pre‑silicon.
• Help develop firmware and test generation software tools to increase productivity and ensure quality of custom CMOS circuit test methods and ATE test flows for next generation FPGA SOC devices.
• Help define and develop ATE test flows and hardware to meet product quality, cost and manufacturing throughput goals.
• Support initial silicon bring‑up through debug and roll‑out of calibration and manufacturing defect screening test flows.
• Transfer new product test plans, test flows and hardware to Operations teams.
• Support continuous innovation in test development, rollout, product quality and cost.

Requirements / Qualifications

• BSEE / BSCS or equivalent MSEE / MSCS preferred.
• Knowledge of CMOS digital or analog circuit operation and characteristics.
• Knowledge of Verilog and basic logic design.
• Knowledge of VLSI test methods such as Built In Self Test, Memory March patterns, ATPG, Stuck‑At Fault modeling is a plus.
• Capable of programming in C/C++, JAVA, or similar language.
• Capable of operating basic bench equipment, DVM, oscilloscope, logic analyzer, etc. in a lab environment.

Travel Time

0% - 25%

Physical Attributes

Feeling, Hearing, Other, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements

10% standing, 10% walking, 80% sitting, 100% in doors; Usual business hours

Pay Range

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading ESPP program with a 2 year look back feature. The annual base salary range for this position, which could be performed in California, is $68,640 - $128,000.*

• Range is dependent on numerous factors including job location, skills and experience.

Equal Employment Opportunity

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies

Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.