Technical Staff Engineer - Digital Design

Microchip; San Jose (CA); On-site; USD 70,304 - 143,000; Full time

Benefits offered by this job

Wellness & Medical Benefits effective on day one

401(k) Retirement Savings Plan

Tuition Reimbursement

Quarterly Employee Cash Bonus Plan

Job summary

Microchip in San Jose, CA, is seeking a Technical Staff Engineer specialized in Digital Design. The role focuses on developing and maintaining FPGA IP units and full FPGA system designs, collaborating with cross-functional teams throughout the development lifecycle.

The ideal candidate will possess over 12 years of experience in FPGA/ASIC design, with a strong background in VHDL/Verilog. Candidates must also demonstrate strong analytical and communication skills while adhering to U.S. export laws.

Qualifications

• 12+ years of relevant experience.
• Hands-on experience with FPGA/ASIC design and verification.
• Experience with digital systems and computer architecture.

Responsibilities

• Work with cross-functional teams to define new product features.
• Create functional FPGA IP units from initial ideas.
• Assemble multiple IP complexes into a full FPGA system design.
• Write detailed documentation for IP and FPGA designs.
• Create test benches to simulate and verify IP units.

Skills

FPGA/ASIC design experience

VHDL or Verilog

Digital design concepts

Analytical skills

Problem-solving skills

Education

Bachelor’s degree in electrical engineering or related field

Master’s degree in electrical engineering or related field

Tools

Libero

Quartus

Vivado

ModelSim

QuestaSim

Job description

Job Description

Microchip Technology Inc. is a leading provider of embedded control applications

Our product portfolio includes 8‑bit, 16‑bit, and 32‑bit microcontrollers, 32‑bit microprocessors, FPGAs, high‑performance linear, mixed‑signal, power, thermal, RF, timing, safety, security, wired and wireless connectivity devices, serial EEPROM, Serial Flash, Parallel Flash, and serial SRAM. We also license Flash‑IP solutions used in a broad range of products.

Position Overview

The Technical Staff Engineer – Digital Design is based in the San Jose, CA office. The FTS systems group develops network timing equipment such as PTP Grandmasters and NTP servers. The role focuses on creating and maintaining FPGA IP units and full FPGA system design, including collaboration with HW/SW/Marketing/Test/Manufacturing teams, planning, specification, design, documentation, simulation, hardware bring‑up, and product sustaining. Future team‑lead or management responsibilities are possible.

Responsibilities

• Work with cross‑functional teams to define new product features.
• Create functional FPGA IP units from initial ideas.
• Assemble multiple IP complexes into a full FPGA system design, including CPU subsystem, PLLs, block RAMs, DSPs, transceivers, and custom IP.
• Write detailed documentation for IP and FPGA designs.
• Create test benches to simulate and verify IP units.
• Build and test complex FPGA designs.
• Collaborate with hardware engineers to bring up new boards and FPGA designs.
• Create and use tools for testing.
• Support SW engineers in developing and debugging drivers for FPGA units.
• Learn existing IP and FPGA designs in collaboration with FPGA engineers.

Qualifications

• Bachelor’s degree in electrical engineering, computer engineering, or a related field.
• 12+ years of relevant experience.
• 10+ years of FPGA/ASIC IP and system design experience.
• Experience with VHDL and/or Verilog.
• Hands‑on experience with FPGA/ASIC design and verification.
• Strong understanding of digital design concepts and principles.
• Excellent analytical and problem‑solving skills.
• Proficient knowledge of digital systems and computer architecture.
• Excellent written and verbal communication, and documentation skills.
• Attention to detail and ability to drive tasks to completion independently in a timely manner.

Preferred Qualifications

• Master’s degree in electrical engineering, computer engineering, or a related field.
• Experience with Ethernet design, IEEE 1588 PTP and NTP protocols.
• Experience with clock/frequency synthesis and measurement.
• Experience with FPGA build tools (e.g., Libero, Quartus, Vivado).
• Experience with FPGA debug tools (e.g., SignalTap, ChipScope).
• Experience with simulation tools (e.g., ModelSim, QuestaSim).
• Experience with Python, TCL, or other scripting languages.
• Experience with board‑level design.

Export Controls

This role requires access to technology, materials, software or hardware controlled by U.S. export laws. Candidates must provide proof of U.S. citizenship, permanent U.S. residency, or protection status as defined in 8 USC 1324b(a)(3).

Benefits

• Wellness & Medical Benefits effective on day one
• Gold Standard Medical, Prescription Drug, Dental & Vision Benefits
• Quarterly Employee Cash Bonus Plan
• Restricted Stock Grant
• Employee Stock Purchase Plan
• Tuition Reimbursement
• 401(k) Retirement Savings Plan
• Spending Accounts
• Life Insurance
• Long Term Care
• Legal Assistance
• Employee Assistance Plan

Paid Time Off

• Vacation Pay
• Absence Time (Sick Pay)
• 10 Paid Holidays

Travel and Physical Requirements

Travel: 0% – 25%

Physical Requirements: 70% sitting; 15% walking; 15% standing; 100% in doors; usual business hours

Pay Range

The total compensation package includes base pay, restricted stock units, quarterly bonuses, health benefits, retirement savings plans, and an industry‑leading ESPP with a 2‑year look‑back feature. Base salary range: $70,304 – $143,000, depending on location, skills, and experience.

Equal Employment Opportunity

Microchip Technology Inc. is an equal‑opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the “Know Your Rights: Workplace Discrimination Is Illegal” poster.