Emulation Verification Engineer - Wireless SoCs

Apple Inc.; San Diego (CA); Hybrid; USD 175,000 - 309,000; Full time

Job summary

Apple Inc. invites a Senior Emulation Verification Engineer to join the emulation team focused on verification of large Wireless SoCs.

The role includes porting designs to the Palladium platform and executing detailed emulation test plans with cross-functional collaboration across Design, Architecture, Power, Silicon Validation and Software teams. You will develop and use monitors/checkers, write SystemVerilog/UVM-based testbenches, and contribute to verification environments and debug

Qualifications

• BS and a minimum of 10 years relevant industry experience.
• Experience with SystemVerilog, Verilog or UVM.
• Experience in creating test benches from scratch (Block and System Level).
• Experience in Regression Management and Triaging.

Responsibilities

• Work closely with emulation team to bring up large Wireless SoCs along with their mixed signal components in emulation platform.
• Develop/utilize monitors and checkers on emulation platform.
• Preparing and executing the test plan and performing reviews with the cross functional teams.
• Collaborating cross functionally with Design, Architecture, Power, Silicon Validation, Performance and SW Teams.
• Developing code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM.

Skills

Analytical skills

Debugging

Collaborative work

Education

BS in Electrical Engineering or related

Tools

SystemVerilog

Verilog

UVM

Palladium/Veloce/Zebu

FPGA flow

Python/Perl/Tcl

Job description

Apple Inc. invites a Senior Emulation Verification Engineer to join the emulation team focused on verification of large Wireless SoCs.

The role includes porting designs to the Palladium platform and executing detailed emulation test plans with cross-functional collaboration across Design, Architecture, Power, Silicon Validation and Software teams. You will develop and use monitors/checkers, write SystemVerilog/UVM-based testbenches, and contribute to verification environments and debug