Emulation & Post-Silicon Validation Engineer (ASIC/FPGA)

Qualcomm; San Diego (CA); On-site; USD 99,000 - 148,000; Full time

Job summary

Qualcomm Technologies, Inc. seeks a highly capable Junior/Senior Emulation Engineer to support ASIC/FPGA design validation. You will develop emulation environments, port RTL to Palladium, Veloce, or FPGA prototyping, and collaborate across RTL, verification, and software teams for early co-validation.

The role emphasizes SystemVerilog, C/C++, Linux, and Python skills, with AI-assisted tools to speed up debugging and analysis. Onsite in San Diego, CA.

Qualifications

• Bachelor's or Master's in Electrical/Computer Engineering, CS or related field.
• 0-2+ years of ASIC verification, FPGA prototyping, or hardware emulation.
• Strong SystemVerilog, C/C++, Linux, and Python skills.

Responsibilities

• Develop, deploy, and maintain ASIC/FPGA emulation environments for complex SoC designs.
• Port RTL designs to Palladium, Veloce, or FPGA prototyping platforms.
• Collaborate with RTL, verification, architecture, and software teams for early co-validation.
• Develop testbenches, transactors, and verification infra using SystemVerilog and C/C++.
• Create Python automation to boost regression and debugging efficiency.
• Apply AI-assisted tools to accelerate verification and data analysis.

Skills

SystemVerilog

C/C++

Linux

Python

ASIC Emulation

FPGA Prototyping

SoC Verification

Hardware/Software Co-Validation

Debug & Root Cause Analysis

AI-Assisted Tools

Automation & Scripting

Cross-Functional Collaboration

Education

Bachelor's degree in Science, Engineering, or related field

Tools

Cadence Palladium

Protium

Siemens Veloce

Synopsys ZeBu

Job description

Qualcomm Technologies, Inc. seeks a highly capable Junior/Senior Emulation Engineer to support ASIC/FPGA design validation. You will develop emulation environments, port RTL to Palladium, Veloce, or FPGA prototyping, and collaborate across RTL, verification, and software teams for early co-validation.

The role emphasizes SystemVerilog, C/C++, Linux, and Python skills, with AI-assisted tools to speed up debugging and analysis. Onsite in San Diego, CA.