Embedded Power Electronics Engineer II

Talently

Anderson (SC)

On-site

USD 90,000 - 120,000

Full time

9 days ago
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Job summary

Talently in Anderson, SC is seeking an embedded hardware engineer to own power electronics design for battery-powered products from concept through prototype to production, collaborating with firmware, mechanical, and test teams to deliver robust solutions.

The role emphasizes hands-on lab validation, MOSFET switching in 20–80 V systems, thorough debugging, and development of test plans in a fast-paced, stage-gate environment.

Qualifications

  • BS in Electrical Engineering or related field.
  • 3+ years in embedded electronics design with hardware ownership.
  • Experience in power conversion and motor drives for battery-powered systems.
  • Hands-on MOSFET switching in 20–80V systems with gate drive and protection.

Responsibilities

  • Design and own power electronics hardware for battery-powered products, including architecture and PCB layout.
  • Design and debug MOSFET switching power stages and supporting circuits.
  • Support motor control hardware implementations and HW/FW interfaces.
  • Prototype, test, and troubleshoot embedded electronics; perform root cause analysis.
  • Lead design activities from component selection to test plan development and execution.
  • Communicate technical direction across hardware, firmware, product development, and test teams.

Skills

Power electronics
Embedded hardware design
MOSFET switching
Schematic capture
PCB layout
32-bit microcontroller
HW/FW interface
Debugging
Root cause analysis

Education

Bachelor's degree in Electrical Engineering

Tools

Altium

Job description

Talently in Anderson, SC is seeking an embedded hardware engineer to own power electronics design for battery-powered products from concept through prototype to production, collaborating with firmware, mechanical, and test teams to deliver robust solutions.

The role emphasizes hands-on lab validation, MOSFET switching in 20–80 V systems, thorough debugging, and development of test plans in a fast-paced, stage-gate environment.

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