Embedded FPGA/PLD Design Engineer – Aerospace

Jobtailor; West Hartford (CT); On-site; USD 110,000 - 150,000; Full time

Job summary

Jobtailor is seeking an experienced FPGA/PLD design engineer in the United States to lead Digital Circuit design efforts, generate block diagrams, and support SOI audits and design reviews.

You will collaborate with cross-functional teams to plan projects, establish realistic estimates, ensure compliance with TECS processes, and drive the transition from development to production while meeting DFx targets.

Qualifications

• Bachelor's degree in Electrical Engineering
• 3+ years FPGA/PLD design experience; aerospace experience preferred
• Concentration in FPGA/PLD Digital Circuit design with Analog interfacing
• Excellent written and verbal communication skills
• Strong troubleshooting and problem-solving abilities

Responsibilities

• Collaborate with cross-functional team leads and engineers to plan and execute projects
• Ensure teams have requirements, direction, and resources to deliver products
• Establish realistic estimates to meet customer and internal deliverables
• Perform requirements development, allocation, and compliance assessment
• Generate block diagrams for PLD/FPGA and digital design concepts
• Prepare for and conduct SOI audits and Design Reviews
• Perform analyses/simulations on digital and analog interfaces
• Ensure compliance to TECS internal processes (NPI, Standard Work, Design Reviews)
• Meet or exceed DFx, Design-To-Cost and Design-To-Weight targets
• Support internal and external customer meetings
• Support Design Assurance and Qualification Testing
• Support transition of a program from development to production

Skills

FPGA/PLD design

Digital circuit design

Analog interfacing

Requirements development

Troubleshooting

Cross-functional collaboration

Education

Bachelor's degree in Electrical Engineering

MSEE preferred

Job description

Jobtailor is seeking an experienced FPGA/PLD design engineer in the United States to lead Digital Circuit design efforts, generate block diagrams, and support SOI audits and design reviews.

You will collaborate with cross-functional teams to plan projects, establish realistic estimates, ensure compliance with TECS processes, and drive the transition from development to production while meeting DFx targets.