EM/IR Power Integrity CAD Flow Engineer

Intel Corporation; Folsom (CA); Hybrid; USD 142,000 - 269,000; Full time

Job summary

Intel Corporation in California seeks an experienced EDA CAD / Tool Flow Development Engineer to develop transistor-level EM/IR analysis flows for advanced nodes across IPs and macros. You will work with circuit; physical; reliability; and signoff teams to enable scalable EM/IR methodologies and silicon correlation.

The role emphasizes CAD methodology, automation infrastructure, and power integrity analysis, with a hybrid work model and locations in Santa Clara, Folsom, Hillsboro, Austin, and

Qualifications

• Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science; 6+ years experience; or 4+ years with a Master's; or 2+ years with a PhD.
• EM/IR reliability concepts (Electromigration, and Power Drop)
• Experience with CMOS circuit operation, Power delivery networks, SPICE simulation, Parasitic extraction fundamentals, Advanced-node design challenges, Transistor-level power integrity analysis flows, Scripting and automation in Linux environments.

Skills

EM/IR concepts

SPICE

Scripting & Linux automation

Education

Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science

Master's degree

PhD

Tools

Redhawk/Totem

Job description

Intel Corporation in California seeks an experienced EDA CAD / Tool Flow Development Engineer to develop transistor-level EM/IR analysis flows for advanced nodes across IPs and macros. You will work with circuit; physical; reliability; and signoff teams to enable scalable EM/IR methodologies and silicon correlation.

The role emphasizes CAD methodology, automation infrastructure, and power integrity analysis, with a hybrid work model and locations in Santa Clara, Folsom, Hillsboro, Austin, and