Edge AI Vision Processor ASIC Design Engineer

VisLab (an Ambarella Inc. company); Kentucky; On-site; USD 130,000 - 160,000; Full time

Benefits offered by this job

RSU grants

Annual RSU grants

Competitive benefits

Job summary

VisLab (an Ambarella Inc. company) seeks an AI Vision Processor engineer to design and verify edge-ready video processing hardware using Verilog and SystemVerilog for smart cameras and autonomous devices.

You will optimize RTL for performance and power, develop front-end methodologies, and collaborate with verification teams to close coverage gaps. Master’s in a relevant field with 0–5 years experience is required, with a base salary range of $130,000–$160,000.

Qualifications

• Master's degree in Electrical, Electronics, or Computer Engineering, with 0–5 years of relevant experience.
• Solid understanding of computer architecture, logic design, and VLSI design principles.
• Proficiency in SystemVerilog, Verilog, and Perl; familiarity with design verification methodologies and functional coverage concepts.
• Experience with scripting languages and the ability to write assembly language programs.
• Strong communication skills and a collaborative, team-oriented mindset; problem-solving and analytical thinking.

Responsibilities

• Design and implement video compression, image processing, vector processing, neural network accelerators, processor cores, and memory subsystems using Verilog and SystemVerilog.
• Perform logic design, implementation, and verification utilizing Verilog, SystemVerilog, and relevant programming and scripting languages.
• Synthesize and optimize RTL for performance, area, and power efficiency.
• Develop and enhance front-end design methodologies and tool flows.
• Contribute to chip bring-up and validation efforts.
• Analyze code and functional coverage metrics, and collaborate with the verification team to identify and address coverage gaps.

Skills

Verilog/SystemVerilog

Perl

Scripting languages

Assembly language

Computer architecture

VLSI design principles

Education

Master's degree in Electrical, Electronics, or Computer Engineering

Tools

Verilog

SystemVerilog

Assembly language

Design verification methodologies

Job description

VisLab (an Ambarella Inc. company) seeks an AI Vision Processor engineer to design and verify edge-ready video processing hardware using Verilog and SystemVerilog for smart cameras and autonomous devices.

You will optimize RTL for performance and power, develop front-end methodologies, and collaborate with verification teams to close coverage gaps. Master’s in a relevant field with 0–5 years experience is required, with a base salary range of $130,000–$160,000.