Edge AI Vision ASIC Design Engineer II

AMC OU Ambarella Corp; United States; Vor Ort; USD 130.000 - 160.000; Vollzeit

Benefits dieser Stelle

RSU grants

Competitive compensation

Career development opportunities

Zusammenfassung

Ambarella is seeking engineers for AI Vision Processors for edge applications. You will design and implement video processing cores, memory subsystems, and accelerators using Verilog and SystemVerilog, and contribute to RTL optimization and front-end methodologies.

The role requires a Master’s degree with 0–5 years of experience, strong computer architecture knowledge, and proficiency in SystemVerilog/Verilog and Perl. Excellent communication and team collaboration are essential.

Qualifikationen

• Master’s degree in Electrical, Electronics, or Computer Engineering with 0–5 years of relevant experience.
• Solid understanding of computer architecture, logic design, and VLSI design principles.
• Proficiency in SystemVerilog, Verilog, and Perl.
• Familiarity with design verification methodologies and functional coverage concepts.
• Experience with scripting languages and the ability to write assembly language programs.

Aufgaben

• Design and implement video compression, image processing, vector processing, neural network accelerators, processor cores, and memory subsystems using Verilog and SystemVerilog.
• Perform logic design, implementation, and verification utilizing Verilog, SystemVerilog, and relevant programming and scripting languages.
• Synthesize and optimize RTL for performance, area, and power efficiency.
• Develop and enhance front-end design methodologies and tool flows.
• Contribute to chip bring-up and validation efforts.
• Analyze code and functional coverage metrics, and collaborate with the verification team to identify and address coverage gaps.

Kenntnisse

SystemVerilog

Verilog

Perl

Scripting languages

Assembly programming

Logic design

Computer architecture

VLSI design principles

Communication skills

Ausbildung

Master’s degree in Electrical/ Electronics/ Computer Engineering

Tools

Design verification methodologies

Jobbeschreibung

Ambarella is seeking engineers for AI Vision Processors for edge applications. You will design and implement video processing cores, memory subsystems, and accelerators using Verilog and SystemVerilog, and contribute to RTL optimization and front-end methodologies.

The role requires a Master’s degree with 0–5 years of experience, strong computer architecture knowledge, and proficiency in SystemVerilog/Verilog and Perl. Excellent communication and team collaboration are essential.