Edge AI Verification Intern: Shape the GPNPU Core

quadric technologies; Burlingame (CA); On-site; USD 69,000 - 79,000; Part time

Benefits offered by this job

Catered lunch

Office in Burlingame

Mentorship and project ownership

Job summary

Quadric invites interns to work hands-on on verifying a next-generation processor architecture. You will document test plans, write tests, and generate coverage for the GPNPU, gaining exposure to CPU/GPU verification methodologies.

Based in Burlingame, CA, you will collaborate with hardware architects and designers, develop fluency in SystemVerilog/SystemC/C++, and contribute to real verification tasks while onsite in the Bay Area.

Qualifications

• Pursuing Bachelor's/Master's/PhD in CS/EE.
• Familiarity with verification methodologies for CPU or GPU designs.
• Proficient in SystemVerilog, SystemC, or C/C++ (UVM is a plus).
• Collaborate to document test plans, write and debug tests, and generate coverage.
• Strong problem-solving and communication skills.

Responsibilities

• Document test plans for the GPNPU.
• Write and debug tests against the processor architecture.
• Generate coverage to assess verification completeness.
• Collaborate with hardware architects and designers to understand design intent.

Skills

SystemVerilog

SystemC

C/C++

Debugging

Documentation

Problem-solving

Education

Bachelor's/Master's/PhD in CS/EE

Tools

UVM

Job description

Quadric invites interns to work hands-on on verifying a next-generation processor architecture. You will document test plans, write tests, and generate coverage for the GPNPU, gaining exposure to CPU/GPU verification methodologies.

Based in Burlingame, CA, you will collaborate with hardware architects and designers, develop fluency in SystemVerilog/SystemC/C++, and contribute to real verification tasks while onsite in the Bay Area.