EDA Intern - Silicon Design & AI (Summer 2027)

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 39,000 - 73,000; Full time

Benefits offered by this job

Paid holidays

401(k) with employer match

Job summary

Cadence Design Systems, Inc. in San Jose, California, is offering a three-month, summer 2027 internship with the Customer Success Team.

Interns will work with leading EDA tools and collaborate with experts across silicon design, systems development, and design automation. The program covers design fundamentals, embedded software, UNIX/C/C++, scripting languages (Perl, Tcl, Python), digital/analog design, signoff analysis, and AI-enabled design flows.

Qualifications

• Rising senior pursuing a bachelor’s degree in electrical engineering or computer engineering or another STEM discipline.
• Experience with EDA, silicon/package/board design, or AI use cases preferred.
• Strong communication, presentation, assessment, and analytical skills.

Responsibilities

• Participate in a three-month, cohort-based internship program in Summer 2027.
• Gain hands-on training in system and package design; IC design and simulation; physical design and analog layout; verification; hardware emulation; and AI applications.
• Collaborate with technical experts in Cadence CST and provide design services, technical sales support, and customer support to Cadence’s advanced customers.

Skills

Strong communication

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

Tools

UNIX

C/C++

Python

Perl

Tcl

Job description

Cadence Design Systems, Inc. in San Jose, California, is offering a three-month, summer 2027 internship with the Customer Success Team.

Interns will work with leading EDA tools and collaborate with experts across silicon design, systems development, and design automation. The program covers design fundamentals, embedded software, UNIX/C/C++, scripting languages (Perl, Tcl, Python), digital/analog design, signoff analysis, and AI-enabled design flows.