DRAM Systems Architecture

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 177,000 - 387,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Income protection

Paid family leave

Paid time-off program

Paid holidays

Job summary

1000 Micron Technology, Inc. is looking for a Senior Technical Leader in its DRAM Architecture organization. This pivotal role involves crafting advanced DRAM system architectures while influencing industry standards and strategies.

The ideal candidate will possess extensive hands-on experience in memory systems, along with the capability to liaise with executives and customers effectively. A Bachelor's degree in a relevant field is required, with a Master's or PhD preferred.

Our compensation package includes a competitive salary range of $177,000 to $387,000 annually, along with comprehensive benefits.

Qualifications

• Experience in DRAM or memory systems architecture is essential.
• Deep understanding of DRAM timing, signaling, power, and reliability mechanisms is required.
• Proven ability to translate system requirements into silicon architecture.

Responsibilities

• Define next-generation memory system builds focusing on performance.
• Lead co-optimization spanning multiple system aspects.
• Architect sophisticated features and translate needs into silicon.
• Drive long-range memory technology strategy.
• Act as a liaison to customers and partners.

Skills

DRAM architecture

Technical leadership

System architecture

Memory systems

Education

Bachelor's degree in EE, CE, CS or related field

Master's degree or PhD in a related technical field

Job description

Job Overview

A senior technical leadership position within Micron’s DRAM Architecture organization. The role involves developing complete DRAM system architectures, influencing industry direction, and engaging directly with customers and executives to convert complex ideas into scalable products.

Responsibilities

• Define next‑generation memory system builds focusing on performance, capacity, RAS, and telemetry.
• Lead cross‑stack co‑optimization spanning silicon, package, module, board, and system.
• Architect sophisticated RAS and telemetry features and translate system needs into silicon.
• Drive long‑range memory technology strategy and influence industry standards.
• Act as a senior technical liaison to customers, executives, and partners.

Qualifications

• Minimum Qualifications:
  • Bachelor’s degree or relevant equivalent experience in EE, CE, CS, or a related field.
  • Extensive hands‑on experience in DRAM or memory systems architecture.
  • Deep understanding of DRAM timing, signaling, power, and reliability mechanisms.
  • Proven ability to translate system requirements into silicon architecture.
• Preferred Qualifications:
  • Master’s degree or PhD, or equivalent experience, in a related technical field.
  • Recognized technical leadership influencing multiple products or teams.
  • Experience engaging tier‑1 customers and ecosystem partners.
  • History of architectural innovations adopted into production.

Compensation

The US base salary range for this full‑time position is: $177,000.00 – $387,000.00 per year. Additional compensation may include benefits, bonuses, and equity.

Benefits

• Medical, dental, and vision plans.
• Income protection if unable to work due to illness or injury.
• Paid family leave.
• Robust paid time‑off program and paid holidays.

Equal Employment Opportunity

Micron is proud to be an equal‑opportunity workplace and an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity, or any other factor protected by applicable federal, state, or local laws.