DRAM Design Rules Intern: AI & Automation

Micron Technology, Inc

Boise (ID)

On-site

USD 28,000 - 48,000

Full time

14 days+
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Job summary

Micron Technology, Inc. in Boise, Idaho, is seeking a DRAM Design Rules Intern to contribute to design rule development, validation, automation, and enablement for next-generation memory products.

You will collaborate with Design, CAD, Process Integration and Verification teams, applying Python, Tcl, or Perl, and AI‑supported analytics to accelerate learning cycles and improve methodologies. Minimum qualifications include pursuing a Bachelor's, Master's, or PhD in Electrical/Computer Engineering

Qualifications

  • Pursuing Bachelor's/Master's/PhD in EE or related engineering discipline.
  • Fundamental understanding of CMOS devices and semiconductor manufacturing processes.
  • Programming or scripting experience using Python, Tcl, Perl, or similar languages.
  • Demonstrated analytical, problem-solving, and debugging skills.
  • Effective written and verbal communication skills with the ability to collaborate within multi-functional engineering teams.

Responsibilities

  • Develop, document, validate, and optimize semiconductor design rules for advanced memory technologies.
  • Create methodologies, automation scripts, and workflows to boost design productivity and verification quality.
  • Perform design rule validation, verification, and analysis using industry-standard EDA tools and AI analytics frameworks.
  • Collaborate with Design, CAD, Process Integration, Verification, and Product Engineering teams on technology features and manufacturability requirements.
  • Support test chip planning, validation activities, and data analysis using AI.

Skills

Python scripting
Tcl scripting
Perl scripting
AI/ML concepts

Education

Bachelor's/Master's/PhD in Electrical/Computer Engineering or related field

Tools

Cadence Virtuoso
Calibre
Synopsys

Job description

Micron Technology, Inc. in Boise, Idaho, is seeking a DRAM Design Rules Intern to contribute to design rule development, validation, automation, and enablement for next-generation memory products.

You will collaborate with Design, CAD, Process Integration and Verification teams, applying Python, Tcl, or Perl, and AI‑supported analytics to accelerate learning cycles and improve methodologies. Minimum qualifications include pursuing a Bachelor's, Master's, or PhD in Electrical/Computer Engineering

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