DRAM Architecture Intern: AI-Driven Simulation

Micron Technology, Inc.

Boise (ID)

On-site

USD 63,000 - 77,000

Full time

4 days ago

Be an early applicant

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Benefits offered by this job

Medical, dental and vision plans

Paid time-off

Paid holidays

Job summary

Micron Technology, Inc. is seeking a DRAM Architecture Research Intern in Boise, Idaho. You will develop software frameworks, automation tools, and AI-assisted workflows to accelerate memory architecture research and analysis.

You will collaborate with architects and researchers to evaluate next‑gen memory technologies and document methodologies. The role involves designing AI-driven simulation generation, performing performance and power analyses, and exploring design-space trade-offs for DRAM,

Qualifications

0-2 years of relevant experience through research, internships, academic projects, publications, or engineering experience in computer architecture, memory systems, simulation, AI, or software development.
Currently pursuing a Master's or PhD degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
Experience programming in Python, C++, or similar languages used for software development, simulation, automation, or data analysis.
Familiarity with computer architecture, memory systems, performance analysis, modeling, simulation, or systems research.
Demonstrated ability to leverage AI-enabled tools to improve productivity, technical analysis, problem-solving, and engineering workflows.
Experience using generative AI platforms such as Microsoft Copilot, GPT, Claude, Gemini, or similar technologies.
Strong analytical, problem-solving, technical communication, and collaboration skills.

Responsibilities

Develop and enhance software frameworks, simulation environments, and automation tools that support DRAM architecture research and evaluation.
Design and implement AI-assisted workflows for simulation generation, experiment automation, data analysis, technical documentation, and engineering productivity.
Analyze memory architectures, including DRAM, LPDDR, DDR6, MRDIMM, CAMM, and emerging memory technologies, using modeling and simulation techniques.
Perform performance, power, bandwidth, latency, and workload characterization studies to identify architectural trade-offs and optimization opportunities.
Collaborate with architects and researchers to document methodologies, present findings, and contribute to future memory technology strategies and research initiatives.