DMTS Design Engineer — DRAM Memory Innovator & Leader

Micron Technology; San Jose (CA); On-site; USD 216,000 - 430,000; Full time

Job summary

Micron Technology seeks an Experienced Distinguished Member of Technical Staff to join the DRAM System team. You will analyze current and future memory technologies, identify design gaps, and guide teams on memory direction, with visibility across architecture and product strategy.

This role is part of the Technical Leadership Program, emphasizing leadership, mentorship, and collaboration across DDR4/5, LPDDR, and related technologies.

Qualifications

• Bachelor’s or Master’s degree (or equivalent) in EE/CE/CS or related field.
• Strong understanding of DDR memory architecture including timing, signaling, and system behavior.
• Experience analyzing memory systems at device and system levels.
• Knowledge of high-speed I/O, electrical margins, and memory power/thermal characteristics.

Responsibilities

• Analyze DDR4/DDR5, LPDDR, and emerging memory technologies across electrical, thermal, power and performance.
• Identify performance gaps and evaluate tradeoffs in cost, latency, bandwidth and efficiency.
• Translate analysis into actionable design guidance with architecture and product teams.
• Drive multi-functional alignment with firmware, validation, hardware, and business partners.
• Deliver clear technical assessments and recommendations to guide memory strategy.
• Utilize AI tools to build models and summarize data for distribution and analysis.

Skills

DDR memory architecture

Memory systems analysis

High-speed I/O & power/thermal

Data-driven recommendations

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering or CS

Tools

Artificial Intelligence tools

Job description

Micron Technology seeks an Experienced Distinguished Member of Technical Staff to join the DRAM System team. You will analyze current and future memory technologies, identify design gaps, and guide teams on memory direction, with visibility across architecture and product strategy.

This role is part of the Technical Leadership Program, emphasizing leadership, mentorship, and collaboration across DDR4/5, LPDDR, and related technologies.