Distinguished Memory Architect for DRAM Systems

Micron Technology, Inc.; San Jose (CA); Presencial; USD 216.000 - 430.000; Jornada completa

Descripción de la vacante

Micron Technology, Inc. seeks a Distinguished Member of Technical Staff to lead architecture analysis for AI, cloud, and enterprise platforms.

You will bridge DRAM architecture from device organization to data-center systems and guide product roadmaps for DRAM, LPDDR, HBM, CXL, SSD, and disaggregated memory. The role requires 15+ years in memory/storage architecture with strong quantitative analysis and leadership, plus experience applying responsible AI governance.

Formación

• PhD or MS in Electrical Engineering, Computer Engineering, Computer Science or related discipline.
• 15+ years in memory or storage architecture, system architecture or performance engineering.
• Deep expertise in memory or storage systems, from device behavior to system-level performance.
• Demonstrated ability to influence product direction through quantitative analysis.
• Strong record of patents, publications or industry leadership.
• Owns decisions where AI is part of the process, with responsible AI governance.

Responsabilidades

• Lead DRAM architecture analysis from device to data center level, connecting memory with system modeling.
• Drive optimization across the full stack including memory controllers, firmware and subsystems.
• Influence architecture decisions across multiple business units and mentor senior staff.
• Apply AI-enabled workflows to architecture modeling with human review points.

Conocimientos

Memory architecture

Quantitative analysis

Technical leadership

AI governance

Communication

Educación

PhD or MS in Electrical/Computer Engineering or CS

Herramientas

AI modeling tools

Descripción del empleo

Micron Technology, Inc. seeks a Distinguished Member of Technical Staff to lead architecture analysis for AI, cloud, and enterprise platforms.

You will bridge DRAM architecture from device organization to data-center systems and guide product roadmaps for DRAM, LPDDR, HBM, CXL, SSD, and disaggregated memory. The role requires 15+ years in memory/storage architecture with strong quantitative analysis and leadership, plus experience applying responsible AI governance.