Senior DRAM Architect for AI Memory Systems

Micron Technology; Folsom (CA); On-site; USD 177,000 - 387,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Paid family leave

Robust paid time-off program

Paid holidays

Job summary

Micron Technology is seeking a CMBU Product Architecture Engineer for DRAM in Folsom, California. This role focuses on guiding DRAM strategies for AI, collaborating closely with industry architects and leading R&D teams. Candidates should have a Bachelor’s in Electrical Engineering and 12+ years of experience. Responsibilities include analyzing system architectures and defining memory features to enhance DRAM value in AI workloads. A robust compensation package is offered, including benefits and paid time off.

Qualifications

• 12+ years of engineering experience.
• Familiarity with LPDDR and/or DRAM module architectures.
• Experience with TSV, stacked packaging, or 3D packaging technologies.

Responsibilities

• Explore and analyze system architectures using modeling, simulation, and prototyping tools.
• Identify system bottlenecks and propose innovative solutions.
• Lead pathfinding efforts for architectures using LPDDR and DRAM module technologies.

Skills

Electrical Engineering

System Architecture Analysis

LPDDR/DRAM Familiarity

Memory Hierarchy Understanding

3D Packaging Technologies

Education

Bachelor’s degree in Electrical Engineering

Job description

Micron Technology is seeking a CMBU Product Architecture Engineer for DRAM in Folsom, California. This role focuses on guiding DRAM strategies for AI, collaborating closely with industry architects and leading R&D teams. Candidates should have a Bachelor’s in Electrical Engineering and 12+ years of experience. Responsibilities include analyzing system architectures and defining memory features to enhance DRAM value in AI workloads. A robust compensation package is offered, including benefits and paid time off.