Director, FPGA Architecture & Config

Advanced Micro Devices

San Jose (CA)

On-site

USD 180,000 - 320,000

Full time

11 days ago
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Benefits offered by this job

AMD benefits at a glance

Job summary

Advanced Micro Devices is seeking a Director of Silicon Architecture in San Jose to define and drive next-generation FPGA architecture for adaptive devices. You will lead configuration, readback, and Partial Reconfiguration, translating customer needs into differentiated FPGA capabilities across AI, data center, embedded, and automotive markets.

You will build and lead a small team of architects, guiding architecture specs and cross-functional execution with silicon, RTL, software, tools,

Qualifications

  • BS, MS or PhD in Electrical/Computer Engineering or related field.
  • Proven record of architectural leadership and productizable innovations.
  • Experience translating customer needs into architectural roadmaps.

Responsibilities

  • Lead FPGA configuration architecture, including bitstream formats and boot flows.
  • Define next-gen Partial Reconfiguration architecture for low latency and security.
  • Establish long-term roadmap for configuration, readback, debug, and observability.
  • Drive runtime reconfiguration innovations for adaptive, high-availability systems.
  • Collaborate with silicon, RTL, software, tools, validation, and product teams.

Skills

FPGA architecture leadership
Configuration & Partial Reconfig.
FPGA toolchains
Cross-functional leadership
Executive stakeholder influence

Education

BS/MS/PhD in EE/CE/CS
Patents/publications/standards

Tools

FPGA toolchains

Job description

Advanced Micro Devices is seeking a Director of Silicon Architecture in San Jose to define and drive next-generation FPGA architecture for adaptive devices. You will lead configuration, readback, and Partial Reconfiguration, translating customer needs into differentiated FPGA capabilities across AI, data center, embedded, and automotive markets.

You will build and lead a small team of architects, guiding architecture specs and cross-functional execution with silicon, RTL, software, tools,

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