Digital ASIC NPI Engineer: Silicon Bring-Up & Validation

Protingent; Seattle (WA); On-site; USD 76,000 - 110,000; Full time

Benefits offered by this job

HDHP or POS insurance

Education/certification reimbursement

Pre-tax commuter benefits

Paid Time Off (PTO)

401k plan

Job summary

Protingent Staffing has a contract opening for a Digital ASIC NPI Engineer in Seattle, WA. The role focuses on silicon bring-up, validation, and NPI test activities to advance new silicon products.

You will work with design, test, software, quality, and supply chain teams to resolve technical roadblocks, perform yield tuning, and develop test automation while ensuring robust pre- and post-silicon validation.

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering.
• 3+ years of silicon bring-up, hardware validation or NPI test experience.
• PCB debugging with schematics, layout tools and rework tools.
• Familiarity with hardware/silicon simulators or emulators bridging pre- and post-silicon validation.
• Experience using oscilloscopes, logic analyzers, power meters and power supplies.
• Programming and automation experience in Python and C#.

Responsibilities

• Silicon Bring-Up and Validation.
• Yield tuning and process optimization (DFM/DFT).
• Test automation development and hardware troubleshooting.
• Simulator integration.
• Lifecycle milestone management.
• Collaborate with design, test, software, quality and supply chain teams to resolve roadblocks.

Skills

Python

C#

Oscilloscope

Logic analyzers

Power meters

Power sources

Simulator integration

Education

BS in Electrical Engineering or Computer Engineering

MS in Electrical Engineering or Computer Engineering

Tools

NI TestStand

LabVIEW

Job description

Protingent Staffing has a contract opening for a Digital ASIC NPI Engineer in Seattle, WA. The role focuses on silicon bring-up, validation, and NPI test activities to advance new silicon products.

You will work with design, test, software, quality, and supply chain teams to resolve technical roadblocks, perform yield tuning, and develop test automation while ensuring robust pre- and post-silicon validation.