Digital and Mixed Signal IC Design/DV Engineer

Texas Instruments; Tucson (AZ); On-site; USD 120,000 - 180,000; Full time

Job summary

Texas Instruments in Tucson, AZ, is seeking a highly motivated engineer to join the Current Sensing product line that develops cutting edge shunt and Hall based mixed signal current sensing ICs. You will contribute across architectural development, design, DV, tapeout and bring-up in a role blending digital and mixed-signal domains.

You will design, verify and optimize IC blocks, collaborate with cross-functional teams, and help drive first-pass silicon success in a fast-paced environment.

Responsibilities

• Design & Implementation: Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis.
• Verification: Develop and implement robust, scalable verification methodologies for mixed-signal ICs, including testbench creation and automation using DMS and AMS stimulus and checkers.
• Test Development: Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments.
• Collaboration & Problem Solving: Work closely with design and system teams to define Design for Verification (DFV) architectures, triage and resolve bugs, and ensure first-pass silicon success.
• Coverage & Reporting: Drive verification coverage to meet defined goals, track progress, and communicate status, issues, and risks effectively.
• Continuous Improvement and Automation: Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation.

Job description

Change the world. Love your job.
We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing product line that develops cutting edge Shunt and Hall based mixed signal current sensing ICs. As a key member of our team, you will play a vital role in all phases of IC development, from architectural development, design, DV, tapeout and bring-up. This position offers a unique opportunity to develop expertise in both digital and mixed-signal domains.

Job Responsibilities:

• Design & Implementation: Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis.
• Verification: Develop and implement robust, scalable verification methodologies for mixed-signal ICs, including testbench creation and automation using DMS and AMS stimulus and checkers.
• Test Development: Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments.
• Collaboration & Problem Solving: Work closely with design and system teams to define Design for Verification (DFV) architectures, triage and resolve bugs, and ensure first-pass silicon success.
• Coverage & Reporting: Drive verification coverage to meet defined goals, track progress, and communicate status, issues, and risks effectively.
• Continuous Improvement and Automation: Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation.