Design Verification Engineer | BCP

Texas Instruments; Knoxville (TN); On-site; USD 110,000 - 160,000; Full time

Job summary

Texas Instruments in Knoxville, TN is seeking a Design Verification Engineer to help ensure first-pass silicon success for analog and mixed-signal ICs across industrial, automotive and consumer applications. You will drive verification strategy across the full cycle from plans to regression, collaborating with analog, digital and systems teams.

This role focuses on building test benches, RTL and GLS simulations, developing models, and improving DV methods and tooling to raise quality and

Qualifications

• Experience creating verification plans and test benches.
• Experience with SystemVerilog and Verilog-AMS is a plus.
• Ability to run regression analyses and interpret coverage results.

Responsibilities

• Develop detailed verification plans with design and system teams to ensure first-pass silicon success.
• Create test benches, tests and simulations at RTL and GLS.
• Develop behavioral models for analog circuits using SystemVerilog and Verilog-AMS.
• Operate regression tools and write scripts to submit regression cases.
• Run coverage regressions to meet defined goals and report status.

Job description

Change the world. Love your job.

Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Knoxville, TN. In this role, you will develop and execute verification strategies that ensure first-pass silicon success for next-generation analog and mixed-signal ICs across industrial, automotive and consumer applications.

As a Design Verification Engineer, you will work across the full verification cycle – from developing detailed verification plans and building test benches through running coverage regressions, tracking closure and contributing to continuous improvements in DV methodology. You will collaborate closely with analog design, digital design and systems engineering teams.

As a Design Verification Engineer in this role, you will be responsible for:

• Developing detailed verification plans while working closely with the design and system team to ensure first pass silicon success
• Developing test benches, tests and simulations at RTL and GLS
• Development of SystemVerilog and Verilog-AMS behavioral models for analog circuits
• Work with regression tools and develop scripts to submit cases for regression analysis
• Running coverage regressions to meet the defined coverage goals
• Tracking and communicating verification status, issues and concerns
• Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods and flows

Put your talent to work with us as a Design Verification Engineer!