DFT Engineer (Design for Testability) - Staff

1000 Micron Technology, Inc.

Richardson (TX)

On-site

USD 120,000 - 150,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Medical, dental, and vision plans
Paid family leave
Robust paid time-off program

Job summary

1000 Micron Technology, Inc. in Texas is seeking a Staff DFT Design Engineer to work on the design, simulation, and validation of advanced memory architectures. The role involves defining DFT architectures, ensuring robust test coverage, and collaborating with various engineering teams.

The ideal candidate will have a Bachelor’s or Master’s degree in Electrical or Computer Engineering and at least 5 years of experience in DFT design. Benefits include comprehensive health plans, paid family leave, and a robust paid time-off program.

Qualifications

  • 5+ years experience in DRAM or ASIC DFT Design or Verification
  • Strong fundamentals in digital design and DFT concepts
  • Familiarity with semiconductor test flows from wafer probe through final test

Responsibilities

  • Define and implement HBM DFT architectures including scan and boundary scan.
  • Collaborate with teams to align DFT with manufacturing test flows.
  • Support yield learning and failure analysis.

Skills

Digital design fundamentals
DFT concepts (scan, MBIST, boundary scan, JTAG)
RTL design (SystemVerilog/VHDL)
Experience with semiconductor test flows

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Staff DFT Design Engineer, you will work on design, simulation, and validation of next generation High Bandwidth Memory (HBM) architectures and circuit blocks. You will define, design, and integrate Design for Test (DFT) architectures for next generation HBM products, ensuring robust test coverage across wafer, die, stack, and system in package (SiP) test stages while balancing performance, power, area, and manufacturing cost.

Responsibilities
  • Define and implement HBM DFT architectures, including scan, MBIST, JTAG, boundary scan, TSV test, redundancy test, and at-speed test structures.
  • Develop DFT solutions for both base die and DRAM die, considering stacked‑die and cube‑level test requirements.
  • Design and integrate test access mechanisms to support wafer probe, cube test, and SiP/system test flows.
  • Collaborate with Product Engineering and Test Enablement teams to align DFT features with manufacturing test flows and cost targets.
  • Support yield learning, failure analysis, and debug by enabling observability and controllability in silicon.
  • Work closely with logic, analog, layout, verification, and physical design teams to ensure DFT is correctly implemented and verified.
  • Collaborate with external partners and customers to align on custom DFT interfaces and security requirements when applicable.
  • Support silicon bring‑up, debug, and qualification activities, including correlation between design intent and manufacturing test results.
Minimum Qualifications
  • Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or related field.
  • Strong fundamentals in digital design and DFT concepts (scan, MBIST, boundary scan, JTAG).
  • Experience with RTL design (SystemVerilog/VHDL) and logic integration.
  • Familiarity with semiconductor test flows from wafer probe through final test.
  • 5+ years DRAM or ASIC DFT Design or Verification experience.
Preferred Qualifications
  • Experience with HBM, DRAM, or advanced memory products.
  • Knowledge of TSV‑based 3D integration and stacked‑die test challenges.
  • Hands‑on experience with at‑speed test, compression, or advanced DFT methodologies.
  • Exposure to DFT security, customer‑specific DFT interfaces, or custom test modes.
  • Structured problem‑solving and debug perspective.
Benefits
  • Choice of medical, dental, and vision plans in all locations.
  • Benefit programs that help protect income if unable to work due to illness or injury.
  • Paid family leave.
  • Robust paid time‑off program and paid holidays.
  • Additional benefit information available in the Benefits Guide.
Equal Employment Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

DFT Engineer (Design for Testability) - Staff
DFT Engineer (Design for Testability) - Staff

Micron Technology • Richardson (TX)

On-site
USD 120,000 - 150,000
Staff HBM Design Architect - DFT
Staff HBM Design Architect - DFT

Micron Technology, Inc • Richardson (TX)

On-site
USD 146,000 - 297,000
Medical, dental, and vision plans
Paid family leave
Robust paid time-off program
Staff SoC DFT Engineer, HBM
Staff SoC DFT Engineer, HBM

1000 Micron Technology, Inc. • Richardson (TX)

On-site
USD 120,000 - 150,000
Medical, dental and vision plans
Income protection programs
Paid family leave
+2
Staff HBM Design Architect - DFT
Staff HBM Design Architect - DFT

Micron Technology • Richardson (TX)

On-site
USD 146,000 - 297,000
Medical, dental, and vision plans
Paid family leave
Paid time-off program
+1
Senior Engineer - HBM Design for Test (DFT)
Senior Engineer - HBM Design for Test (DFT)

Micron Technology • Richardson (TX)

On-site
USD 140,000 - 190,000
Medical plan
Dental plan
Vision plan
+2
New College Grad - Design Engineer, HBM DFT
New College Grad - Design Engineer, HBM DFT

1000 Micron Technology, Inc. • Richardson (TX)

On-site
USD 70,000 - 90,000
Medical, dental, vision plans
Paid time off
Holidays
Principal Design Engineer, DRAM
Principal Design Engineer, DRAM

1000 Micron Technology, Inc. • Boise (ID)

On-site
USD 80,000 - 110,000
Medical, dental, and vision plans
Paid family leave
Paid time-off
+1
New College Grad - Design Engineer, HBM DFT
New College Grad - Design Engineer, HBM DFT

Micron Technology, Inc • Richardson (TX)

On-site
USD 70,000 - 90,000
Medical, dental, and vision plans
Paid family leave
Paid time-off and holidays
Senior Engineer - HBM Design for Test (DFT) Richardson, Texas, United States of America
Senior Engineer - HBM Design for Test (DFT) Richardson, Texas, United States of America

Micron Technology, Inc • Richardson (TX)

Hybrid
USD 120,000 - 180,000
Senior Engineer - HBM Design for Test (DFT)
Senior Engineer - HBM Design for Test (DFT)

1000 Micron Technology, Inc. • Richardson (TX)

On-site
USD 120,000 - 190,000