DFT Engineer

Broadcom, Inc.; Austin (TX); On-site; USD 120,000 - 190,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(K) participation including company

Employee Stock Purchase Program (ESPP)

Employee Assistance Program (EAP)

company paid holidays

paid sick leave and vacation time

Paid Family Leave

Job summary

Broadcom, Inc. in Austin, Texas, seeks a DFT engineer to drive testability for ASIC products from spec to production. You will implement and verify DFT features such as Scan, MBIST, TAP and LBIST, and work with STA teams on timing.

Collaboration with design, test and manufacturing worldwide is essential. The role requires Verilog coding, testbench creation, and scripting in TCL/Perl/Python/C++. Prior experience with ATPG, SSN, and IEEE 1149.1/1149.6 is highly valued.

Qualifications

• Understanding Broadcom & customer DFT feature requirements
• Experience with Scan, MBIST, TAP, LBIST, IO, SerDes DFT integration
• Knowledge of ATPG vector generation, simulation, & debugging
• Verilog coding, testbench creation & simulation
• Memory BIST insertion & verification on embedded memory
• IEEE 1149.1/1149.6, IJTAG, ICL, PDL familiarity
• Strong problem solving, debugging & cross-team communication

Responsibilities

• Understand Broadcom & customer DFT feature requirements
• Implement DFT including Scan, MBIST, TAP, LBIST, IO and SerDes integration
• Collaborate with STA engineers for test closure
• Generate, verify & debug test vectors before tape release
• Validate & debug vectors on ATE during silicon bring up
• Assist silicon failure analysis and yield improvement
• Interface with customers and global design/test teams
• Work with IP DFT engineers & stakeholders
• Debug customer returned parts on the ATE

Skills

IO & Analog DFT

ATPG & Scan

BIST

Scan Compression

DFT Tools: DFT Compiler

Mentor TestKompress

SSN

Verilog

Testbench & Simulation

IEEE 1149.1/1149.6

Analog/Digital Design

Si processing & synthesis

Transistor reliability

Problem solving

Education

Bachelor's in Electrical/Electronic/Computer Engineering

5+ years of relevant industry experience

Master's in Electrical/Electronic/Computer Engineering

3+ years with Master's option

Tools

DFT Compiler

Mentor TestKompress

TetraMax

Fastscan

Job description

Job Description

Broadcom's ASIC Product Division is seeking candidates for a DFT position at our Austin, Texas Development Center. The successful candidate will work on DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production. The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)’s designs – DFT Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers. It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.

Responsibilities

• Understanding Broadcom & customer DFT feature requirements
• Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
• Working closely with STA and DI Engineers design closure for test
• Generating, Verifying & Debugging Test vectors before tape release
• Validating & Debugging Test vectors on ATE during the silicon bring up phase
• Assisting with silicon failure analysis, diagnostics & yield improvement efforts
• Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
• Working closely with I/P DFT engineers & other stakeholders
• Debugging customer returned parts on the ATE

Skills/Experience

• Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others) Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, SSN etc.)
• Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)
• Experience in Verilog coding, testbench generation & simulation Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM) Boundary scan Verification and test vector generation.
• Should have good knowledge in IEEE1149.1 and IEEE1149.6 Basic knowledge of Test-STA and constraints
• Strong background on IEE1687, IJTAG, ICL and PDL, SSN The ability to work in a multi-disciplined, cross-department environment
• Solid knowledge in analog and digital circuit design, and device physics fundamentals
• Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
• Excellent problem solving, debug, root cause analysis and communication skills

Education & Experience

Bachelors in Electrical/Electronic/Computer Engineering and 5+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 3+ years of relevant industry experience

Compensation and Benefits

The annual base salary range for this position is USD To USD

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company paid holidays
• paid sick leave and vacation time

The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Equal Opportunity

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

Company Culture

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

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