DFT Lead Engineer

Broadcom; Austin (TX); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grants

401(k) with company match

ESPP

Job summary

Broadcom in Austin seeks a Principal DFT Engineer to lead ASIC DFT programs from specification to production release. You will design and implement DFT for IO, SerDes, TAP, MBIST, and more, coordinating with STA, DI engineers and global teams.

The role requires strong Verilog/Testbench skills, experience with TetraMax/Fastscan, and automation of DFT and test vectors. Domestic relocation may be required for 7nm+ projects.

Qualifications

• Bachelor's or Master's in Electrical/Electronic/Computer Engineering with 10+ years (Master) or 12+ years (Bachelor) of relevant industry experience.
• Strong DFT background including IO/analog DFT, ATPG, Scan, BIST and related areas.
• Experience with Verilog coding, testbench generation, and simulation.

Responsibilities

• Define DFT specifications for ASICs based on Broadcom and customer requirements.
• Implement DFT features (Scan, MBIST, TAP, LBIST, IO, SerDes) and integrate DFT into designs.
• Collaborate with STA/DI engineers for timing closure and design verification.
• Generate, verify, and debug test vectors; validate on ATE during silicon bring-up.
• Assist with silicon failure analysis and yield improvement efforts.
• Interface with customers, physical design, and global test teams.

Skills

Verilog

ATPG/DFT tooling

TetraMax

Fastscan

C++/Python scripting

Boundary scan (IEEE1149)

Pattern generation

DBG and yield improvement

Education

Bachelor's in Electrical/Electronic/Computer Engineering

Master's in Electrical/Electronic/Computer Engineering

Tools

Verilog

TetraMax

Fastscan

Job description

USA-TX-Austin - River Place B6

Full time

R027691

Job Description:

Principal DFT Engineer

Broadcom's ASIC Product Division is seeking candidates for a DFT position at our Austin, Texas Development Center. The successful candidate will be responsible for leading DFT programs all the way from chip level DFT specification, through to implementation and verification culminating in successfully releasing products to production.

The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products Division)’s designs – DFT Architecture, Test insertion and verification, Pattern generation, Coverage improvement, Post silicon debug and yield improvement to meet the product test metrics. It involves working with the Physical Design & STA team for DFT mode timing closure. The role could also involve direct interaction with external customers.

It is expected that you can code using TCL, PERL, RUBY, PYTHON, C++ or similar.

Responsibilities:

• Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
• Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
• Working closely with STA and DI Engineers design closure for test
• Generating, Verifying & Debugging Test vectors before tape release.
• Validating & Debugging Test vectors on ATE during the silicon bring up phase
• Assisting with silicon failure analysis, diagnostics & yield improvement efforts
• Interfacing with the customer, physical design and test engineering/manufacturing teams located globally
• Working closely with I/P DFT engineers & other stakeholders
• Debugging customer returned parts on the ATE
• Innovating newer DFT solutions to solve testability problems in 7nm & beyond
• Automating DFT & Test Vector Generation flows

Skills/Experience:

• Strong DFT background (such as IO and Analog DFT, ATPG and/or Scan, BIST, and others)
• Scan Insertion and scan compression background (DFT Compiler, Mentor TestKompress, etc.)
• Well-versed in ATPG vector generation, simulation, and debugging. (TetraMax, Fastscan)
• Experience in Verilog coding, testbench generation & simulation
• Memory BIST insertion and verification experience on embedded (SRAM, CAM, eDRAM, ROM)
• Boundary scan Verification and test vector generation. Should have good knowledge in IEEE1149.1 and IEEE1149.6
• Basic knowledge Test-STA and constraints
• Strong background on IEE1687, IJTAG, ICL and PDL
• The ability to work in a multi-disciplined, cross-department environment
• Solid knowledge in analog and digital circuit design, and device physics fundamentals
• Good understanding of Si processing, logical and physical synthesis, and transistor reliability principles
• Excellent problem solving, debug, root cause analysis and communication skills
• Experience working on the ATE is a plus
• Experience with Serdes, DDR, PCIE, ENET, CXL IOBIST verification and silicon debug is a plus
• Experience working on Tessent SSN is highly desired

Education & Experience:

• Bachelors in Electrical/Electronic/Computer Engineering and 12+ years of relevant industry experience or Masters Degree in Electrical/Electronic/Computer Engineering and 10+ years of relevant industry experience

Compensation and Benefits

• As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
• Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.
• The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest in Broadcom!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

For more information please visit our video library (http://www.broadcom.com/videos) and check out our Connected by Broadcom (https://www.broadcom.com/support/resources/video-webinar-library?channel=5c9658f7c1d34eca91c6cc16178e5b1b&video=7d72b04ea50046a394e682fab640ce20) series.

Follow us on Linked In Broadcom Inc (https://www.linkedin.com/company/broadcom) .