DFT DV Engineer | 7+ years | DFT/DV/UVM/System Verilog

Cisco Systems, Inc.

United States

On-site

USD 140,000 - 200,000

Full time

14 days+
Application generator

An application made for this job — a tailored resume and cover letter that speak straight to the posting.

Get past ATS filters

Job summary

Cisco Systems, Inc. in the Common Hardware Group (CHG) designs silicon, optics and hardware platforms powering Cisco's core switching, routing and wireless products worldwide.

The role focuses on DFT test planning, test benches for verification and collaboration with RTL and PD teams to validate test logic across the silicon lifecycle. The candidate will craft solutions, debug efficiently, and bring expertise in SystemVerilog, DFT verification and test bench development to ensure robust

Qualifications

  • Bachelor's or Master's Degree in Electrical or Computer Engineering.
  • 8+ years of experience in DFT verification and test planning.
  • Experience in testbench development based on complex design specifications.
  • Proficient in SystemVerilog for testbench development.
  • Debugging experience with DVE/Verdi.
  • Scripting skills: Tcl, Python or Perl.

Responsibilities

  • You will work with Front-end RTL teams and backend physical design teams to understand chip architecture and drive high-quality DFT verification.
  • Develop detailed test plans and test benches to verify DFT architecture supporting ATE screening and in-system test.
  • Collaborate with design, verification, and PD teams to integrate and validate test logic across all design phases.
  • Contribute to innovative DFT and test strategy for new silicon models, bare die, and stacked die, enabling reusable test methods.
  • Craft solutions and debug efficiently as part of the team.

Skills

DFT verification
Test bench development
Test planning
SystemVerilog
Debugging with DVE/Verdi
Scripting Tcl/Python/Perl

Education

Bachelor's or Master’s Degree in Electrical or Computer Engineering

Tools

DVE/Verdi
UVM

Job description

Meet the Team:

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio.

Your Impact:

  • You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification.

  • Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design

  • Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the implementation and post silicon validation flows.

  • Work with the team on Innovative Hardware DFT & test strategy aspects for new silicon device models, bare die & stacked die, driving re-usable test and debug methodologies and standards.

  • The job requires the candidate to have the ability to craft solutions and debug efficiently.

Minimum Qualifications:

  • Bachelor's or Master’s Degree in Electrical or Computer Engineering required with at least 8+ years of experience.

  • Experience in developing detailed test plans and test benches for DFT verification

  • Prior experience in test planning based on complex design specification.

  • Prior experience in testbench development using System Verilog.

  • Debugging experience using DVE/Verdi.

  • Scripting skills: Tcl, Python/Perl.

Preferred Qualifications:

  • UVM and advanced System Verilog knowledge.

  • Knowledge about JTAG protocol, scan architecture, MBIST and boundary scan.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior DFT Verification Engineer - SystemVerilog & JTAG
Senior DFT Verification Engineer - SystemVerilog & JTAG

Cisco Systems, Inc. • United States

On-site
USD 140,000 - 200,000
DFT Engineer
DFT Engineer

Entrada Ventures • Palo Alto (CA)

Hybrid
USD 160,000 - 230,000
Equity
401(k)
Meaningful equity
DFT Engineer
DFT Engineer

Delos Data • Palo Alto (CA)

On-site
USD 160,000 - 220,000
Equity
401(k)
Comprehensive benefits package
DFT - Staff DFT Engineer
DFT - Staff DFT Engineer

Eliyan Corporation • San Francisco (CA)

On-site
USD 120,000 - 150,000
Excellent benefits
Fun work environment
DFT - Staff DFT Engineer
DFT - Staff DFT Engineer

Eliyan • San Francisco (CA)

On-site
USD 180,000 - 240,000
Excellent benefits
Innovative work environment
DFT Lead Engineer
DFT Lead Engineer

Broadcom • San Jose (CA)

On-site
USD 144,000 - 230,000
Discretionary annual bonus
Equity grants
401(k) with company matching
+1
Principal SoC DFT Engineer
Principal SoC DFT Engineer

Nokia • San Jose (CA)

On-site
USD 130,000 - 160,000
DFT Engineer
DFT Engineer

Socket.dev • San Jose (CA)

On-site
USD 122,000 - 195,000
Senior DFT Architect (remote)
Senior DFT Architect (remote)

VeroTech • Town of Belgium (WI)

Hybrid
USD 120,000 - 150,000
Company car
Monthly net allowances
Yearly bonus
+3
DFT Engineer
DFT Engineer

Select Minds LLC • Lansing (MI)

On-site
USD 120,000 - 190,000
Day-1 Onsite
Competitive salary
Opportunity for advancement