Enable job alerts via email!

Design Verification Engineer (University Grad)

Meta

Sunnyvale (CA)

On-site

USD 114,000 - 133,000

Full time

30+ days ago

Boost your interview chances

Create a job specific, tailored resume for higher success rate.

Job summary

Join a forward-thinking company as a Design Verification Engineer, where you'll validate cutting-edge Augmented Reality technology. This role offers the chance to collaborate with a talented team, defining verification plans and improving methodologies in a dynamic environment. As part of a leading tech firm, you'll contribute to groundbreaking projects that blend the digital and physical worlds. If you're passionate about innovation and eager to make an impact in the tech industry, this opportunity is perfect for you. Embrace the future of technology and help shape the next evolution in social connection!

Benefits

Bonus
Equity
Comprehensive benefits package

Qualifications

  • Currently pursuing or obtained a Bachelor's in a relevant field.
  • Experience with System Verilog, UVM, and EDA tools is essential.

Responsibilities

  • Define verification plans for core IP or SoCs with researchers.
  • Collaborate with cross-functional teams to ensure design quality.

Skills

System Verilog
C
C++
Problem Solving
Interpersonal Skills

Education

Bachelor's degree in Computer Science
Master's degree in Computer Science

Tools

UVM (Universal Verification Methodology)
EDA tools
Python
TCL
Perl
Shell scripting
Git
Mercurial (Hg)
SVN

Job description

Design Verification Engineer (University Grad)

Meta

University Grad - Engineering, Tech & Design

Meta's Reality Labs (RL) focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon team is driving the state-of-the-art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistor, through architecture, to firmware, and algorithms.

As a Design Verification Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design and verification skills to implement the testing infrastructure to validate new core IP or SoC implementations. You will work closely with researchers, architects, and designers in creating test bench requirements and test cases for multiple state-of-the-art IPs or SoCs.

Responsibilities
  1. Work with researchers and architects defining verification plans for each of the different core IP or SoCs.
  2. Define and track detailed test plans for the different modules and top levels.
  3. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage.
  4. Debug, root-cause and resolve functional failures in the design, partnering with the Design team.
  5. Collaborate with cross-functional teams like Design, Model, Emulation, and Silicon validation teams towards ensuring the highest design quality.
  6. Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools, and technologies from the industry.
Minimum Qualifications
  1. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.
  2. Experience in languages such as System Verilog, C, C++.
  3. Experience with verification methodologies like UVM (Universal Verification Methodology).
  4. Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
  5. Experience analyzing complex problems and identifying effective solutions.
  6. Must obtain work authorization in the country of employment at the time of hire, and maintain ongoing work authorization during employment.
  7. Interpersonal experience: cross-group and cross collaboration.
Preferred Qualifications
  1. Experience with revision control systems like Mercurial(Hg), Git or SVN.
  2. Experience with verification of ARM/RISC-V based sub-systems or SoCs.
  3. Master's degree in Computer Science, Computer Engineering, or a related field.

About Meta

Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram, and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.

$114,000/year to $133,000/year + bonus + equity + benefits

Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

Equal Employment Opportunity and Affirmative Action

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, reproductive health decisions, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, political views or activity, or other applicable legally protected characteristics. You may view our Equal Employment Opportunity notice here.

Meta is committed to providing reasonable support (called accommodations) in our recruiting processes for candidates with disabilities, long term conditions, mental health conditions or sincerely held religious beliefs, or who are neurodivergent or require pregnancy-related support. If you need support, please reach out to accommodations-ext@meta.com.

Apply for this job

Take the first step toward a rewarding career at Meta.

Explore jobs that match your skills and experience. Search by technology, team or location to find an opening that’s right for you.

Get your free, confidential resume review.
or drag and drop a PDF, DOC, DOCX, ODT, or PAGES file up to 5MB.

Similar jobs

Design Verification Engineer (University Grad)

Lensa

Sunnyvale

On-site

USD 114,000 - 133,000

6 days ago
Be an early applicant

Cellular SOC Design Verification Engineer - Entry Level

Lensa

Sunnyvale

On-site

USD 121,000 - 184,000

6 days ago
Be an early applicant

Senior Design Verification Engineer

QuEST Global

Sunnyvale

On-site

USD 114,000 - 291,000

10 days ago

Design Verification Engineer, Silicon

Google

Mountain View

On-site

USD 132,000 - 189,000

7 days ago
Be an early applicant

ASIC Verification Engineer, GPU - New College Grad 2025

Lensa

Santa Clara

On-site

USD 96,000 - 184,000

4 days ago
Be an early applicant

Verification Engineer - New College Grad 2025

Lensa

Santa Clara

On-site

USD 96,000 - 213,000

6 days ago
Be an early applicant

ASIC Verification Engineer, GPU - New College Grad 2025

NVIDIA

Santa Clara

On-site

USD 96,000 - 184,000

7 days ago
Be an early applicant

ASIC Verification Engineer - New College Grad 2025

Nvidia Corporation in

Santa Clara

On-site

USD 96,000 - 184,000

12 days ago

ASIC Verification Engineer - New College Grad 2025

NVIDIA

Santa Clara

On-site

USD 96,000 - 213,000

29 days ago