Design Verification Engineer

Apple Inc.; California; Sur place; USD 175 000 - 309 000; Plein temps

Avantages offerts par ce poste

Employee stock purchase plan

Comprehensive medical and dental

Retirement benefits

Résumé du poste

Apple Inc. in California seeks an outstanding design verification engineer to enable the production of fully functional first silicon for IP designs.

You will own DV methodology, test-plan development, and verification environment creation, including stimulus and checkers, with coverage tracking. You will develop block, IP and SoC level test-benches, drive verification bring-up and regression, and report DV progress using diverse metrics.

Qualifications

• BS degree in a technical subject with proven experience.
• Deep knowledge of SystemVerilog and UVM required.
• Experience building scalable, portable verification environments.
• Familiarity with LLMs for verification efficiency is encouraged.

Responsabilités

• Study design specifications and create a test plan.
• Develop DV infrastructure in SystemVerilog/UVM to stress the design.
• Fix issues from regressions and close bugs.
• Use LLMs to improve verification efficiency and quality.

Connaissances

SystemVerilog

UVM

OOP

Test benches

verification methodologies

LLMs

Power-aware UPF

Python

PCIe

USB

Formation

BS degree in technical subject area

Outils

Simulators

Waveform viewers

Build and run automation

Coverage tooling

Description du poste

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet and changing the game? We have an opportunity for an outstandingly hardworking design verification engineer! As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers daily.This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. The responsibilities include all phases of pre-silicon verification including but not limited to: establishing DV methodology, test-plan development, verification environment development including stimulus and checkers, test-writing, debug, coverage, sign-off for RTL freeze and tape-out.

Description

In this role, you will be responsible for ensuring bug-free first silicon for part of the SoC / IP and are encouraged to develop detailed test and coverage plans based on the micro-architecture. You are responsible for developing verification methodology suitable for the IP, ensuring a scalable and portable environment. You will get to develop verification environment, including all the respective components such as stimulus, checkers, assertions, trackers, coverage. A mindset to break the design is highly desirable. Furthermore, you will develop verification plans for all features under your care, execute verification plans, including design bring-up, DV environment bring-up, regression enabling features, and debug of the test failures. You will also learn to develop block, IP and SoC level test-benches track and report DV progress using a variety of metrics, including bugs and coverage. You will also be expected to make use of LLM and related technologies to achieve efficient execution and improved quality.

Responsibilities

• Study design specification and create test plan
• Develop infrastructure in SystemVerilog/UVM to stress the design
• Develop and fix failures from regressions, close bugs
• Use LLMs to do verification efficiently

Minimum Qualifications

• BS degree in technical subject area with minimum 10 years of proven experience or equivalent.

Preferred Qualifications

• Deep knowledge of OOP, SystemVerilog and UVM
• Deep knowledge in developing scalable and portable test-benches
• Strong experience with verification methodologies and tools such as simulators, waveform viewers, Build and run automation, coverage collection, gate level simulations
• Working experience using LLMs for efficiency and quality
• Experience with power-aware (UPF) or similar verification methodology
• Excellent knowledge of one of the scripting languages such as Python, Perl, TCL
• Experience with serial protocols such as PCIe or USB, parallel protocol such as DDR is a plus but not required
• Knowledge of formal verification methodology is a plus but not required
• Knowledge of emulation for verification technologies is a plus but not required

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $175,000 and $308,500, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants