Design Verification Engineer

Apple Inc.

Beaverton (OR)

On-site

USD 110,000 - 170,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Job summary

Apple is seeking a Design Verification Engineer in Beaverton, Oregon to verify the functionality and performance of Apple’s premier SOCs. You will develop test plans, coverage plans, and verification methodologies, and collaborate closely with design, architecture and software teams.

Strong experience in SystemVerilog, digital simulation, UVM, and C/C++ is preferred. BS degree with 3+ years of relevant industry experience is required.

Qualifications

  • BS degree and 3+ years in chip verification or related field.
  • Strong knowledge of SystemVerilog, digital simulation and debugging.
  • Familiarity with computer architecture and digital design fundamentals.
  • Experience with UVM verification methodology is preferred.
  • Proficiency in programming languages such as Python or Perl is valued.

Responsibilities

  • Verify functionality and performance of Apple SOCs.
  • Develop test plans, tests, and coverage plans for verification.
  • Define verification methodology and testbenches for IPs/subsystems.
  • Collaborate with design, architecture and software teams on use cases and corner conditions.
  • Focus on one main IP type or multiple SOC subsystems as needed.

Skills

SystemVerilog
Digital simulation
Verification methodologies like UVM
Computer architecture fundamentals
Algorithms and data structures
Interpersonal skills

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Tools

Python
Perl
C/C++
Assembly

Job description

Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology and we'd love to have you join us.

Description

As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test optimally. You develop test plans, tests & coverage plans as well as define our next generation verification methodology & testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. The SOC contains many subsystems and IP, so you may be working on one or several of the following types of IP: Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems for ProRes and other codec formats such as VP9, AV1, Hardware security, including cryptographic algorithm implementations, High-Speed IO standards such as PCI Express, DisplayPort, MIPI, Power management and fabric infrastructure, Memory cache management, Display Subsystem for variety of panels and products. These are just some examples of the exciting designs that are part of our team. Joining SOC DV allows you to focus deeply on one main IP or expand your breadth as you work on a collection of subsystems. It’s up to you!

Minimum Qualifications
  • Minimum of BS + 3 years relevant industry experience.
Preferred Qualifications
  • Methodology & philosophy
  • Knowledge of SystemVerilog, digital simulation and debug
  • Knowledge of computer architecture and digital design fundamentals
  • SW programming skills with knowledge of data structures and algorithms
  • Experience with Python, Perl, or similar scripting language
  • Ability to work independently to deliver the project goals
  • Knowledge of verification methodologies like UVM
  • Experience with C/C++, assembly is a plus
  • Excellent interpersonal skills and the dream to tackle diverse challenges

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Design Verification Engineer
Design Verification Engineer

Apple Inc. • San Diego (CA)

On-site
USD 175,000 - 309,000
Employee stock programs
Relocation assistance
Bonuses/Commission
+1
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Sunnyvale (CA)

On-site
USD 150,000 - 278,000
Medical and dental coverage
Stock plan eligibility
Relocation assistance
+1
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Seattle (WA)

On-site
USD 175,000 - 309,000
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Waltham (MA)

On-site
USD 149,700 - 249,500
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 126,000 - 191,000
Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
+1
SoC Full Chip DV Engineer
SoC Full Chip DV Engineer

Apple Inc. • Austin (TX)

On-site
USD 100,000 - 140,000
SoC Full Chip DV Engineer
SoC Full Chip DV Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 120,000 - 180,000
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Town of Texas (WI)

On-site
USD 100,000 - 140,000
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Los Angeles (CA)

On-site
USD 120,000 - 211,000
Medical and dental coverage
Retirement benefits
Employee stock purchase plan
+2
CPU Design Verification Engineer
CPU Design Verification Engineer

Apple Inc. • Santa Clara (CA)

On-site
USD 129,300 - 194,700
Stock programs
Medical and dental coverage
Relocation assistance