Design Verification Engineer

Apple Inc.; Austin (TX); Hybrid; USD 120,000 - 180,000; Full time

Job summary

Apple Inc. in Austin, Texas seeks a verification engineer to ensure SOC and IP quality. You will review designs, develop test plans, and collaborate with design, architecture and software teams to drive robust verification across multiple IP areas.

Responsibilities include creating test benches, coverage plans, and verification methodologies for components such as Neural Engine hardware, memory controllers, and high-speed interfaces, while delivering 40 hours per week of focused work.

Qualifications

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, or a related field.
• Experience with SystemVerilog/UVM to develop test benches and sequences.
• Proficiency in Python or Perl scripting.
• Experience with NCSIM and Xcelium for waveform debugging.
• C++ coding for CPU-related tasks and verifying RTL with assertions.
• Knowledge of digital design and test coverage concepts.

Responsibilities

• Review design and architecture specifications and verify IP/subsystem quality.
• Develop test plans, tests, and coverage plans; define verification methodology and test benches.
• Collaborate with design, architecture, and software teams to cover use cases and corner conditions.
• Drive test cases for IPs such as Neural Engine hardware, memory controller logic, and high-speed IO.

Skills

SystemVerilog/UVM

Python

Perl

C++

Assertions

Functional coverage

Code coverage

Education

Bachelor’s degree in Electrical Engineering or Electronics Engineering

Tools

NCSIM

Xcelium

Job description

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Ensure the quality of the SOC or an IP or subsystem. Review design and architecture specifications and work closely with design & micro-architecture teams. Develop test plans, tests & coverage plans as well as define our next generation verification methodology & test benches. Communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases. Work on one or several of the following types of IP such as Neural Engine hardware, DRAM subsystem, memory controller logic, Encode and Decode systems for ProRes and other codec formats such as VP9, AV1. Hardware security, including cryptographic algorithm implementations, High-Speed IO standards such as PCI Express, DisplayPort, MIPI. Power management and fabric infrastructure, Memory cache management, Memory Management Unit, and Display Subsystem for variety of panels and product. 40 hours/week.

Minimum Qualifications

• Bachelor’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field.
• Experience and/or education must include:
• Implementing Computer Architecture to understand micro-architecture
• Utilizing System Verilog/UVM to develop test-bench code and test-sequences
• Using Python or Perl for scripting
• Using NCSIM and Xcelium for waveform debug
• Using C++ for writing CPU code
• Utilizing assertions writing to verify RTL
• Implementing Digital Design knowledge to understand design architecture
• Utilizing functional coverage and code coverage understanding to test coverage holes

Preferred Qualifications

• n/a

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