Design Verification (DV) Engineer

Hudson River Trading; New York (NY); On-site; USD 175,000 - 250,000; Full time

Job summary

Hudson River Trading (HRT) is seeking experienced Design Verification engineers to build verification environments for FPGA/ASIC platforms. You will craft testbenches, debug RTL issues, and collaborate directly with designers for rapid bringup of new projects in a fast-paced trading environment.

The ideal candidate has 2+ years in RTL functional verification, strong SystemVerilog/UVM knowledge, and experience with Python. Familiarity with Verilator or Cocotb is a plus.

Qualifications

• Bachelor’s degree in computer science, electrical engineering, or related field.
• 2+ years of RTL functional verification experience for FPGA or ASIC.
• Strong debugging and analytical skills.
• Familiarity with SystemVerilog and UVM.
• Experience with Python and open-source verification tools.

Responsibilities

• Create testbenches and tests for hardware platform in a hybrid environment.
• Root-cause RTL bugs quickly and efficiently.
• Collaborate with designers for rapid bringup of new projects.
• Manage test suites and CI infrastructure.
• Develop and improve open-source and internal tools.

Skills

Debug & analytics

RTL verification

Code & coverage analysis

SystemVerilog & UVM

Python

Verilator & Cocotb

C++

Education

Bachelor’s degree in CS/EE or related field

Tools

Verilator

Cocotb

UVM

Python

Job description

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technology to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators.

These high performance designs require even higher performance verification. We are looking for experienced Design Verification (DV) engineers who are skilled at writing testbenches and building verification environments to exercise complex HDL. Our ideal candidate is not only an ace tester, but a practicing toolsmith. You know the EDA landscape and want to be part of a team actively working to rethink, redesign, and surpass the status quo. For example, members of our team are active maintainers of popular open source projects such as Slang, Verilator, and Cocotb.

FPGA and ASIC verification is part of an innovative, growing team at HRT which is integral to the success of our trading. You can expect to always be challenged by the ever-changing financial markets as you work to ensure correctness and robustness of our critical hardware in an extremely fast-paced, real-time environment. No financial experience is necessary.

Responsibilities

• Creating testbenches and tests for our hardware platform, leveraging a hybrid open-source/proprietary, highly flexible environment
• Quickly root-cause RTL bugs
• Collaborating directly with designers for rapid bringup of new projects and debugging of existing designs
• Managing test suites and continuous integration infrastructure
• Developing and improving open-source and internal tools

Qualifications

• Superb debug and analytical skills
• Professional experience (2+ years) in RTL functional verification for FPGA or ASIC
• Experience with code and functional coverage collection/analysis
• Experience with SystemVerilog and industry-standard frameworks such as UVM
• Experience with Python
• Familiarity with Verilator and/or Cocotb preferred
• C++ experience is a plus
• A bachelor’s degree in computer science, electrical engineering, or a related field

The estimated base salary range for this position is 175,000 to 250,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package.

Culture

Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading.

At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office.

Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you.

Please be advised: Use of AI tools during interviews or assessments is strictly prohibited, unless otherwise instructed or agreed upon. We employ various methods to evaluate the authenticity of candidate responses. If we determine that AI assistance was used during any stage of the hiring process, we reserve the right to immediately disqualify your candidacy or rescind any job offers extended.