CPU DFT Engineer

Qualcomm

Santa Clara (CA)

On-site

USD 142,200 - 213,400

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Competitive annual discretionary bonus
Annual RSU grants
Comprehensive benefits package

Job summary

A leading tech company is seeking a DFT Engineer to work closely with chip architects and designers on mixed signal and digital VLSI designs. The role involves creating test vectors, validating DFT requirements, and ensuring high test coverage. Ideal candidates will have extensive experience in digital ASIC design, proficiency in Verilog or VHDL, and expertise with Mentor Tessent tools. This position offers a competitive salary range of $142,200 to $213,400, along with a comprehensive benefits package.

Qualifications

  • 5+ years of practical experience in relevant fields.
  • Familiarity with ASIC test, DFT, and debug techniques.
  • Experience managing large design verification.

Responsibilities

  • Create test vectors or oversee their creation.
  • Validate DFT requirements are being met.
  • Work with designers to increase test coverage.

Skills

Digital ASIC design
Verilog
VHDL
TCL
Perl/Python
Scripting

Education

BA/BS in Electrical/Computer Engineering
Master's degree in Electrical Engineering
PhD in Electrical Engineering

Tools

Mentor Tessent tools

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > CPU Engineering

General Summary:

As a DFT Engineer you will work with chip architects, chip designers, implementation engineers and test engineers to verify the DFT and DFD (Design for Debug) architecture, implementation, and test plans for both mixed signal and digital VLSI designs. Then you’ll ensure it becomes reality. We’re doing a ground up implementation of a new chip architecture, so you’ll have to ability to affect a new design.

Qualifications:
  • BA/BS degree in Electrical/Computer Engineering with 5+ years of practical experience
  • Strong fundamentals in digital ASIC design; experience using Verilog or VHDL
  • Experience with ASIC test, DFT, and debug
  • 3+ years of practical experience with test or DFT
  • Experience using the Mentor Tessent tools
  • Experience with defining and implementing SOC level verification on large designs.
  • Experience in TCL, Perl/Python and Shell scripting
Preferred Qualifications:
  • Hands-on expertise with commercial test generation tools for large complex designs
  • Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, and MBIST, LBIST
  • Experience running test compression software
  • Strong sense of ownership, self-driven
Roles and Responsibilities:
  • Create test vectors or oversee their creation
  • Validate DFT requirements are being met
  • Work with designers to increase test coverage, debug observability and flexibility
  • Verify post-PD designs meet DFT requirements
  • Work with test personnel, stepping in to do run tests when needed
Minimum Qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$142,200.00 - $213,400.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at link.

If you would like more information about this role, please contact Qualcomm Careers.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

ASIC DTCO, Timing and Technology Engineer
ASIC DTCO, Timing and Technology Engineer

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 210,000
RFIC Design Engineer
RFIC Design Engineer

Qualcomm • San Diego (CA)

On-site
USD 99,000 - 148,000
Competitive benefits package
Annual discretionary bonus program
RSU grants
ASIC DTCO, Timing and Technology Engineer
ASIC DTCO, Timing and Technology Engineer

Nutanix • San Diego (CA)

On-site
USD 140,000 - 210,000
Staff Test Engineer, Hardware Security
Staff Test Engineer, Hardware Security

Qualcomm • San Diego (CA)

On-site
USD 135,000 - 202,000
EDA/CAD SW Engineer (Multiple Levels)
EDA/CAD SW Engineer (Multiple Levels)

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 210,000
Competitive annual discretionary bonus
RSU grants opportunity
Comprehensive benefits package
Design Verification Engineer — Memory Subsystem
Design Verification Engineer — Memory Subsystem

Socket.dev • Santa Clara (CA)

On-site
USD 153,000 - 230,000
ASIC Design Verification Engineer
ASIC Design Verification Engineer

Qualcomm • Santa Clara (CA)

On-site
USD 107,000 - 161,000
Digital ASIC Design Engineer
Digital ASIC Design Engineer

Socket.dev • San Diego (CA)

On-site
USD 99,000 - 148,000
Equal opportunity employer
ASICS Design Verification Engineer
ASICS Design Verification Engineer

Qualcomm • San Diego (CA)

On-site
USD 140,000 - 210,000
Competitive salary
Discretionary bonus program
Annual RSU grants
+1
SOC Design Verification Engineer
SOC Design Verification Engineer

Qualcomm • San Diego (CA)

On-site
USD 98,000 - 148,000