Cryogenic Bump Engineer for Quantum Packaging

GlobalFoundries; Essex Junction (VT); On-site; USD 116,000 - 158,000; Full time

Job summary

GlobalFoundries Fab9 is seeking a highly skilled and motivated R&D bump process engineer to become part of our Quantum Advanced Packaging team. This role will entail driving next-generation interconnect scaling development efforts in our Advanced Packaging and Photonics Center (APPC) as well as with our partners.

The primary responsibility of this position is to own development and integration of cryogenic, superconducting bumping processes enabling scalable quantum hardware packaging.

Qualifications

• Master’s in Electrical/Mechanical/Chemical Engineering or Materials Science from an accredited program.
• MS with at least 8 years of related work experience.
• Deep BEOL integration, bump/wafer finish, wafer test/probe, and OSAT collaboration.
• Strong problem-solving and DOE skills.
• Minimum 3.0 GPA and good academic standing.
• English language fluency (written and verbal).
• Up to 10% travel.

Responsibilities

• Lead cryogenic bump interconnect technologies development.
• Define and optimize bump structures, metallurgy, and flows.
• Establish process windows for stability at mK–K temperatures.
• Own end-to-end bump integration from wafer to assembly.
• Develop 2.5D/3D integration schemes (interposers, TSVs).
• Drive alignment between unit processes and system-level packaging requirements.
• Enable rapid prototyping and development-lot movement.
• Support transition from R&D to pilot/high-volume manufacturing.

Skills

Problem solving

DOE

English proficiency

Education

Master’s in Electrical Engineering or related field

MS with 8+ years of related work experience

Tools

BEOL process knowledge

Wafer test & probe

OSAT collaboration

Job description

GlobalFoundries Fab9 is seeking a highly skilled and motivated R&D bump process engineer to become part of our Quantum Advanced Packaging team. This role will entail driving next-generation interconnect scaling development efforts in our Advanced Packaging and Photonics Center (APPC) as well as with our partners.

The primary responsibility of this position is to own development and integration of cryogenic, superconducting bumping processes enabling scalable quantum hardware packaging.