Cryo CMOS Analog IC Designer for Quantum Systems

Global Foundries; Austin (TX); On-site; USD 85,000 - 202,000; Full time

Job summary

GlobalFoundries seeks an analog design engineer to develop high‑performance analog and mixed‑signal ICs and reusable IP for advanced semiconductor applications, including cryogenic CMOS and quantum systems, driving designs from architecture through tapeout and silicon validation.

The role requires a bachelor's degree in electrical engineering or a related field, at least 5 years of analog/mixed-signal IC experience, and proficiency with SPICE, layout, DRC/LVS, and post‑layout extraction, plus up

Qualifications

• Bachelor's degree in Electrical Engineering, Microelectronics, Computer Engineering, Applied Physics, or a related field.
• Minimum 5 years of relevant analog or mixed-signal IC design experience.
• Demonstrated experience taking analog or mixed-signal circuits through schematic design, simulation, layout, DRC/LVS, parasitic extraction, tapeout, and silicon validation.
• Strong knowledge of CMOS analog design fundamentals, including device physics, noise, matching, feedback, stability, frequency response, process variation, and PVT/Monte Carlo analysis.
• Proficiency with industry-standard analog IC design, SPICE simulation, layout, physical verification, and post-layout extraction environments.
• Ability to independently analyze complex circuit and silicon performance issues and translate results into design improvements.

Responsibilities

• Design and develop high-performance analog and mixed-signal CMOS circuits and reusable IP, including amplifiers, bias and reference circuits, regulators, data converters, oscillators, PLLs, clocking circuits, and drivers.
• Own circuit development from architecture and transistor-level design through simulation, layout supervision, physical verification, tapeout, silicon characterization, and design-to-measurement correlation.
• Perform comprehensive circuit analysis across process, voltage, and temperature, including Monte Carlo/mismatch, noise, stability, linearity, timing, and post-layout parasitic simulations.
• Optimize circuit performance across operating temperature ranges, including cryogenic conditions, power constraints, process variation, device behavior, and layout-dependent effects.
• Collaborate with device modeling and PDK teams to assess model accuracy, identify model or design-rule gaps, and provide circuit-level feedback supporting cryogenic and advanced PDK development and validation.
• Drive analog layout requirements and reviews for device matching, common-centroid structures, shielding, isolation, parasitic management, signal integrity, power integrity, and design for manufacturability.
• Define silicon test structures and characterization plans, analyze measured data, debug performance issues, and correlate hardware results with pre-silicon simulation and compact models.
• Lead technical design reviews, document design methodology and results, mentor engineers, and collaborate with cross-functional internal and external teams to enable customer and technology solutions.

Skills

CMOS analog design

SPICE simulations

Circuit troubleshooting

Python scripting

Education

Bachelor's degree in Electrical Engineering or related field

Tools

SPICE

Layout

DRC/LVS

Parasitic extraction

Job description

GlobalFoundries seeks an analog design engineer to develop high‑performance analog and mixed‑signal ICs and reusable IP for advanced semiconductor applications, including cryogenic CMOS and quantum systems, driving designs from architecture through tapeout and silicon validation.

The role requires a bachelor's degree in electrical engineering or a related field, at least 5 years of analog/mixed-signal IC experience, and proficiency with SPICE, layout, DRC/LVS, and post‑layout extraction, plus up