CPU RTL Design Engineer

Intel Corporation; Chandler (AZ); Hybrid; USD 106.000 - 200.000; Vollzeit

Benefits dieser Stelle

Health benefits

Retirement plan

Stock bonuses

Vacation

Zusammenfassung

Intel Corporation's CPU design team seeks a passionate RTL Design Engineer to contribute to logic design, microarchitecture, and RTL development for next-generation processors. You will develop, validate, and optimize RTL in SystemVerilog/Verilog and collaborate across architecture, verification, physical design, and SoC integration teams.

This role offers hybrid work in the US, with locations including Phoenix, AZ and Austin, TX.

Qualifikationen

• 3+ years of relevant RTL design experience required.
• Experience with SystemVerilog/Verilog and RTL development.
• Familiarity with RTL simulation, validation, and debugging.

Aufgaben

• Develop and implement high-quality logic designs for CPU features.
• Write and optimize RTL code to meet power, performance, area, and timing goals.
• Collaborate with architecture teams to define microarchitectural features.
• Review verification plans and resolve RTL test failures.
• Document MAS for CPU designs and support SoC integration.

Kenntnisse

Problem solving

Collaboration

Communication

Learning agility

Attention to detail

Continuous improvement

Ausbildung

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related

Master's degree in same field

PhD in same field

Tools

SystemVerilog

Verilog

RTL simulation tools

Jobbeschreibung

Job Details: Job Description: The Role Join Intel's CPU design team and help develop the processors that power the next generation of computing. As a CPU RTL Design Engineer, you will contribute to the logic design, microarchitecture, and RTL development of Intel processors. You will develop and optimize RTL, validate design functionality through simulation and debug, and work across architecture, verification, physical design, and SoC integration teams to deliver high-quality CPU designs. This is an opportunity to solve complex engineering problems while building deeper expertise in CPU architecture, microarchitecture, digital logic design, SystemVerilog/Verilog, and power, performance, area, and timing optimization.

What You’ll Do

• Develop and implement high-quality logic designs for CPU features, ensuring compliance with architecture and microarchitecture specifications.
• Write and optimize RTL code to meet power, performance, area, and timing goals for physical design implementation.
• Collaborate with architecture teams to define and refine the microarchitectural features of the CPU.
• Review verification plans, analyze test results, and resolve failing RTL tests to ensure feature correctness.
• Document microarchitectural specifications (MAS) for CPU designs.
• Support system‑on‑chip (SoC) customers to ensure seamless integration of your CPU designs into larger systems.

Behavioral traits that we are looking for

• Problem solving: Uses structured analysis and engineering judgment to diagnose complex design and RTL issues.
• Collaboration: Works effectively with engineers across architecture, design, verification, physical design, and SoC integration.
• Communication: Clearly communicates technical concepts, design decisions, tradeoffs, and issues to technical partners.
• Learning agility: Learns new architectures, methodologies, tools, and design concepts and applies them effectively.
• Attention to detail: Applies engineering rigor when implementing, reviewing, debugging, and documenting designs.
• Continuous improvement: Looks for opportunities to improve design quality, engineering efficiency, and development methodologies.

Qualifications

Minimum Qualifications and Experience: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field with 3+ years of relevant experience; OR Master's degree in the same filed with 1+ years of relevant experience; OR PhD in the same field 3+ months of educational experience. Your experience described above must be in the following: Experience with digital logic design and RTL development. Experience coding in SystemVerilog and/or Verilog. Experience with RTL simulation, functional validation, and/or debugging. Experience with architecture, microarchitecture, or digital design concepts.

Preferred Qualifications and Experience

Experience developing or working from microarchitecture specifications. Experience working with design verification and debugging RTL failures.

Why Join This Team?

Be part of a team developing next‑generation CPU technology while expanding your expertise in RTL design and CPU microarchitecture. You’ll solve challenging engineering problems, take ownership of meaningful design work, and collaborate with experienced engineers across architecture, verification, physical design, and SoC integration. This is an opportunity to grow your technical capabilities while contributing to innovative processor designs that help shape the future of computing.

Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, Arizona, Phoenix Additional Locations: US, Texas, Austin

Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust N/A

Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job‑related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on‑site at their assigned Intel site and off‑site. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life. See Intel Benefits for more details.