CPU Physical Electrical Analysis Engineer

Apple Inc.; Austin (TX); On-site; USD 190,000 - 270,000; Full time

Job summary

Apple Inc. in Austin, TX is seeking a CPU Physical Electrical Analysis Engineer to drive block-level and top-level EMIR verification for high-performance processor projects.

You will work on power grid design and EMIR/IR drop analysis, coordinating with CAD/EDA vendors and SOC teams to ensure design convergence and IP delivery on schedule. Strong scripting of SAPR/EMIR flow is required, with deep experience in silicon-level power delivery.

Qualifications

• BS degree and 10+ years of relevant industry experience.
• Experience with silicon-level power delivery, electromigration, and IR drop analysis.
• Scripting SAPR or EMIR flow automation for large-scale design data.

Responsibilities

• Drive block and top-level EMIR/electrical verification closure.
• Work on power grid design, construction, and implementation using existing infrastructures and create custom solutions in the PNR tool environment.
• Collaborate with CAD/EDA vendors, methodology teams, and SOC level teams to meet IP delivery quality and schedule.

Skills

Power delivery analysis

Electromigration

IR drop analysis

SAPR/EMIR scripting

Education

Bachelor's degree

Tools

Apache Redhawk

Cadence Voltus

PNR tooling

Job description

CPU Physical Electrical Analysis Engineer

As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level analysis of high‑performance processor projects in the EMIR/SIGEM/Reliability spheres.

Responsibilities

• Drive block and top‑level EMIR/electrical verification closure.
• Work on power grid design, construction, and implementation using existing infrastructures and, where necessary, create custom solutions in the PNR tool environment.
• Work multi‑functionally with CAD/EDA vendors to ensure fidelity of analysis results, with methodology teams to cover unique use cases, with implementation teams to drive design and sign‑off closure, and with SOC level teams to meet IP delivery quality and schedule.

Minimum Qualifications

• Minimum BS and 10+ years of relevant industry experience.
• Experience with silicon‑level power delivery, electromigration, and IR drop analysis.
• Experience with scripting of SAPR or EMIR flow automation for efficient processing of large‑scale design and analysis data, debugging of issues, and isolating design sensitivities.

Preferred Qualifications

• Experience implementing high‑performance and low‑power VLSI designs.
• Experience with SAPR/PNR design flow infrastructure.
• Understanding of challenges related to the latest deep sub‑micron technology.
• Produce impactful design fixes and automate wherever possible, spanning multiple tool domains in physical construction and analysis.
• Working knowledge of industry‑standard tools like Apache Redhawk and Cadence Voltus, as well as PNR implementation, layout tools, verification, and STA.
• Strong communication and presentation skills to regularly summarize the state of the design and drive design convergence across multiple blocks and teams in a timely fashion.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here— in our culture, our benefits, and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Apple accepts applications to this posting on an ongoing basis.