CPU Implementation Methodology Engineer

Apple Inc.

Beaverton (OR)

On-site

USD 100,000 - 140,000

Full time

14 days+

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Job summary

Apple Inc. in Beaverton, Oregon, is seeking a talented engineer to work on VLSI digital designs. You will generate new ideas and methodologies while collaborating with various teams to improve optimization and implementation strategies.

The ideal candidate will have a Bachelor’s degree and at least 3 years of industry experience, focusing on multi-GHz performance, logic optimization, and strong scripting skills in Python and TCL. Apple is an equal opportunity employer dedicated to inclusion and diversity.

Qualifications

  • Minimum 3+ years of relevant industry experience.
  • Experience with multi-GHz performance goals.

Responsibilities

  • Generate and validate new ideas, working with CPU Designers and CAD teams.
  • Conduct detailed analysis to identify optimization opportunities.
  • Collaborate across teams to improve optimization during Implementation.
  • Contribute to Synthesis and Physical Design Implementation methodologies.

Skills

Experience with implementing VLSI digital designs
Logic optimization trade-offs
Scripting skills
Understanding of deep sub-micron technology
Excellent debugging and problem-solving skills

Education

Minimum BS in a relevant field

Tools

SAPR design tools
Industry standard synthesis tools
STA tools

Job description

Description
  • Generate and validate new ideas, create flows and methodologies around them by working with CPU Designers, CAD teams and EDA tool vendors to improve PPA
  • Detailed analysis across partitions to understand optimization opportunities
  • Cross functional collaboration across STA, library, tech and post silicon teams to improve optimization during Implementation
  • Contribute to aspects of Synthesis and Physical Design Implementation methodologies
Minimum Qualifications
  • Minimum BS and 3+ years of relevant industry experience
  • Experience with implementing VLSI digital designs using SAPR tools with multi-GHz performance goals
  • Experience with logic optimization trade-offs between area, timing and power
Preferred Qualifications
  • Experience implementing high-performance and low-power CPU designs
  • Scripting skills to interface with tools and analyze data
  • Experience with SAPR/PNR design flow infrastructure/scripts
  • Proficiency in programming and scripting (Example: Python, TCL)
  • Understanding of challenges related to latest deep sub-micron technology and ability to write algorithms and code to extract PPA during Implementation
  • Strong interpersonal skills and ability to work effectively in a dynamic team environment
  • Strong understanding and experience using industry standard synthesis, PnR, and STA tools
  • Excellent debugging and problem-solving skills

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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